- Category:
- VHDL-FPGA-Verilog
- Tags:
-
- File Size:
- 73kb
- Update:
- 2016-04-19
- Downloads:
- 1 Times
- Uploaded by:
- 孙大幕
Description:
Based on CPLD stepper motor control implementation using VHDL language programming, by controlling the switch, you can achieve fast forward, slow forward, fast reverse, reverse slow four different states.
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6bujinji (kuozhan)6 - 副本——状态机改
......................................\db
......................................\..\prev_cmp_state_machine.asm.qmsg
......................................\..\prev_cmp_state_machine.fit.qmsg
......................................\..\prev_cmp_state_machine.map.qmsg
......................................\..\prev_cmp_state_machine.qmsg
......................................\..\prev_cmp_state_machine.tan.qmsg
......................................\..\state_machine.db_info
......................................\..\state_machine.sld_design_entry.sci
......................................\incremental_db
......................................\..............\compiled_partitions
......................................\..............\...................\state_machine.db_info
......................................\..............\...................\state_machine.root_partition.map.kpt
......................................\..............\README
......................................\state_machine.asm.rpt
......................................\state_machine.cdf
......................................\state_machine.done
......................................\state_machine.fit.rpt
......................................\state_machine.fit.smsg
......................................\state_machine.fit.summary
......................................\state_machine.flow.rpt
......................................\state_machine.map.rpt
......................................\state_machine.map.summary
......................................\state_machine.pin
......................................\state_machine.pof
......................................\state_machine.qpf
......................................\state_machine.qsf
......................................\state_machine.qws
......................................\state_machine.tan.rpt
......................................\state_machine.tan.summary
......................................\state_machine.vhd
......................................\state_machine.vhd.bak
......................................\state_machine_assignment_defaults.qdf