- Category:
- VHDL-FPGA-Verilog
- Tags:
-
- File Size:
- 2kb
- Update:
- 2017-03-28
- Downloads:
- 1 Times
- Uploaded by:
- 苟李
Description: Endat2.2 protocol suitable for the cable delay compensation means for correcting the timing misalignment due to a delay caused by cables
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