Description: The sourcecode of TinyCPU, which only consumed very few logical cells, written by Verilog. It is a Quartus project, and it can run well on Altera MAXII CPLD, and it is conveniently change to other FPGAs. The CPU used 200 Logical Cells, and the device (peripherals such as SPI, LCD) used 180 Logical Cells.
It also included a assembler source code (by VC2008), which can compile the asm file for the CPU.
To Search:
File list (Check if you may need any files):
tinycpu files\tinyasm
.............\.......\tinyasm.sln
.............\.......\tinyasm
.............\.......\.......\assembler.cpp
.............\.......\.......\assembler.h
.............\.......\.......\ReadMe.txt
.............\.......\.......\stdafx.cpp
.............\.......\.......\stdafx.h
.............\.......\.......\targetver.h
.............\.......\.......\tinyasm.cpp
.............\.......\.......\tinyasm.h
.............\.......\.......\tinyasm.vcproj
.............\tinymcu
.............\.......\cputest.s
.............\.......\cputest16.rom
.............\.......\defs.v
.............\.......\instruction set.docx
.............\.......\internal_osc.bsf
.............\.......\internal_osc.cmp
.............\.......\internal_osc.inc
.............\.......\internal_osc.qip
.............\.......\internal_osc.v
.............\.......\internal_osc_bb.v
.............\.......\internal_osc_inst.v
.............\.......\lcdtest.v
.............\.......\microops.txt
.............\.......\testbench.v
.............\.......\tinycpu.v
.............\.......\tinydevice.v
.............\.......\tinymcu.cdf
.............\.......\tinymcu.pin
.............\.......\tinymcu.pof
.............\.......\tinymcu.qpf
.............\.......\tinymcu.qsf
.............\.......\tinymcu.tis_db_list.ddb
.............\.......\tinymcu.v
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