- Category:
- VHDL-FPGA-Verilog
- Tags:
-
- File Size:
- 15.4mb
- Update:
- 2017-10-27
- Downloads:
- 0 Times
- Uploaded by:
- 刘铭
Description: xilinx IP core library for modelsim simulate, based on ise 13.x, verified in modelsim10.
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