Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: fec Download
 Description: The RS encoding circuit includes a multiplier module and an encoding section RS encoder \mula_0.v RS encoder, \mula_1.v, RS encoder, \rscode.v
 Downloaders recently: [More information of uploader ZJWANG ]
 To Search:
File list (Check if you may need any files): 
mula_1.v
rscode.v
mula_0.v

CodeBus www.codebus.net