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VHDL-FPGA-Verilog
Title:
GF乘法器
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Category:
VHDL-FPGA-Verilog
Tags:
File Size:
1kb
Update:
2018-01-31
Downloads:
0 Times
Uploaded by:
未曾走远
Description:
Galois field multiplier design, contains two modules, the design is relatively simple
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Filename
Size
Date
第17章 伽罗华域GF(q)乘法器设计\ff_const_mul.v
1029
2006-12-05
第17章 伽罗华域GF(q)乘法器设计\ff_mul.v
1600
2006-12-05
第17章 伽罗华域GF(q)乘法器设计
0
2008-07-15
www.pudn.com.txt
218
2007-06-05
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