Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: try Download
  • Category:
  • VHDL-FPGA-Verilog
  • Tags:
  • File Size:
  • 1.9mb
  • Update:
  • 2018-04-02
  • Downloads:
  • 0 Times
  • Uploaded by:
  • 薇
 Description: The addition of IP core adder to the vivado platform developed by Xilinx is applied.
 Downloaders recently: [More information of uploader 薇]
 To Search:
File list (Check if you may need any files): 
FilenameSizeDate
try\try.cache\ip\2017.4\1d0d61f6e0153be0\1d0d61f6e0153be0.xci 6768  2018-03-12

try\try.cache\ip\2017.4\1d0d61f6e0153be0\c_addsub_0.dcp 23487  2018-03-12

try\try.cache\ip\2017.4\1d0d61f6e0153be0\c_addsub_0_sim_netlist.v 19020  2018-03-12

try\try.cache\ip\2017.4\1d0d61f6e0153be0\c_addsub_0_sim_netlist.vhdl 32569  2018-03-12

try\try.cache\ip\2017.4\1d0d61f6e0153be0\c_addsub_0_stub.v 1334  2018-03-12

try\try.cache\ip\2017.4\1d0d61f6e0153be0\c_addsub_0_stub.vhdl 1503  2018-03-12

try\try.cache\ip\2017.4\1d0d61f6e0153be0.logs\runme.log 19507  2018-03-12

try\try.cache\ip\2017.4\64d8cc9a6a4d13a0\64d8cc9a6a4d13a0.xci 6764  2018-03-12

try\try.cache\ip\2017.4\64d8cc9a6a4d13a0\c_addsub_0.dcp 23456  2018-03-12

try\try.cache\ip\2017.4\64d8cc9a6a4d13a0\c_addsub_0_sim_netlist.v 19020  2018-03-12

try\try.cache\ip\2017.4\64d8cc9a6a4d13a0\c_addsub_0_sim_netlist.vhdl 32569  2018-03-12

try\try.cache\ip\2017.4\64d8cc9a6a4d13a0\c_addsub_0_stub.v 1334  2018-03-12

try\try.cache\ip\2017.4\64d8cc9a6a4d13a0\c_addsub_0_stub.vhdl 1503  2018-03-12

try\try.cache\ip\2017.4\64d8cc9a6a4d13a0.logs\runme.log 19507  2018-03-12

try\try.cache\ip\2017.4\de89b742eaede92e\c_addsub_0.dcp 32699  2018-03-12

try\try.cache\ip\2017.4\de89b742eaede92e\c_addsub_0_sim_netlist.v 29469  2018-03-12

try\try.cache\ip\2017.4\de89b742eaede92e\c_addsub_0_sim_netlist.vhdl 46918  2018-03-12

try\try.cache\ip\2017.4\de89b742eaede92e\c_addsub_0_stub.v 1360  2018-03-12

try\try.cache\ip\2017.4\de89b742eaede92e\c_addsub_0_stub.vhdl 1536  2018-03-12

try\try.cache\ip\2017.4\de89b742eaede92e\de89b742eaede92e.xci 6781  2018-03-12

try\try.cache\ip\2017.4\de89b742eaede92e.logs\runme.log 19281  2018-03-12

try\try.cache\ip\2017.4\e1c4d69a8068af2d\c_addsub_0.dcp 32406  2018-03-12

try\try.cache\ip\2017.4\e1c4d69a8068af2d\c_addsub_0_sim_netlist.v 29041  2018-03-12

try\try.cache\ip\2017.4\e1c4d69a8068af2d\c_addsub_0_sim_netlist.vhdl 46530  2018-03-12

try\try.cache\ip\2017.4\e1c4d69a8068af2d\c_addsub_0_stub.v 1340  2018-03-12

try\try.cache\ip\2017.4\e1c4d69a8068af2d\c_addsub_0_stub.vhdl 1509  2018-03-12

try\try.cache\ip\2017.4\e1c4d69a8068af2d\e1c4d69a8068af2d.xci 6782  2018-03-12

try\try.cache\ip\2017.4\e1c4d69a8068af2d.logs\runme.log 19523  2018-03-12

try\try.cache\wt\gui_handlers.wdf 4037  2018-03-13

try\try.cache\wt\java_command_handlers.wdf 1493  2018-03-13

try\try.cache\wt\project.wpc 61  2018-03-13

try\try.cache\wt\synthesis.wdf 5396  2018-03-12

try\try.cache\wt\webtalk_pa.xml 4593  2018-03-13

try\try.cache\wt\xsim.wdf 256  2018-03-12

try\try.hw\try.lpr 290  2018-03-12

try\try.ip_user_files\ip\c_addsub_0\c_addsub_0.veo 2990  2018-03-12

try\try.ip_user_files\ip\c_addsub_0\c_addsub_0.vho 3239  2018-03-12

try\try.ip_user_files\ip\c_addsub_0\c_addsub_0_stub.v 1258  2018-03-12

try\try.ip_user_files\ip\c_addsub_0\c_addsub_0_stub.vhdl 1365  2018-03-12

try\try.ip_user_files\ipstatic\hdl\c_addsub_v12_0_vh_rfs.vhd 403338  2018-03-12

try\try.ip_user_files\ipstatic\hdl\c_reg_fd_v12_0_vh_rfs.vhd 39484  2018-03-12

try\try.ip_user_files\ipstatic\hdl\xbip_addsub_v3_0_vh_rfs.vhd 34426  2018-03-12

try\try.ip_user_files\ipstatic\hdl\xbip_dsp48_addsub_v3_0_vh_rfs.vhd 95183  2018-03-12

try\try.ip_user_files\ipstatic\hdl\xbip_dsp48_wrapper_v3_0_vh_rfs.vhd 143167  2018-03-12

try\try.ip_user_files\ipstatic\hdl\xbip_pipe_v3_0_vh_rfs.vhd 30625  2018-03-12

try\try.ip_user_files\ipstatic\hdl\xbip_utils_v3_0_vh_rfs.vhd 171224  2018-03-12

try\try.ip_user_files\README.txt 130  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\activehdl\compile.do 1531  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\activehdl\c_addsub_0.sh 4979  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\activehdl\c_addsub_0.udo 0  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\activehdl\file_info.txt 848  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\activehdl\README.txt 2186  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\activehdl\simulate.do 412  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\activehdl\wave.do 12  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\ies\c_addsub_0.sh 5751  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\ies\file_info.txt 848  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\ies\README.txt 2127  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\ies\run.f 865  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\modelsim\compile.do 1712  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\modelsim\c_addsub_0.sh 5193  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\modelsim\c_addsub_0.udo 0  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\modelsim\file_info.txt 848  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\modelsim\README.txt 2186  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\modelsim\simulate.do 416  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\modelsim\wave.do 12  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\questa\compile.do 1676  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\questa\c_addsub_0.sh 5306  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\questa\c_addsub_0.udo 0  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\questa\elaborate.do 288  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\questa\file_info.txt 848  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\questa\README.txt 2186  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\questa\simulate.do 197  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\questa\wave.do 12  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\README.txt 3236  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\riviera\compile.do 1497  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\riviera\c_addsub_0.sh 4978  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\riviera\c_addsub_0.udo 0  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\riviera\file_info.txt 848  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\riviera\README.txt 2186  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\riviera\simulate.do 412  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\riviera\wave.do 12  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\vcs\c_addsub_0.sh 7656  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\vcs\file_info.txt 848  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\vcs\README.txt 2186  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\vcs\simulate.do 11  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\xsim\cmd.tcl 464  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\xsim\c_addsub_0.sh 6467  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\xsim\elab.opt 300  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\xsim\file_info.txt 101  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\xsim\README.txt 2186  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\xsim\vhdl.prj 103  2018-03-12

try\try.ip_user_files\sim_scripts\c_addsub_0\xsim\xsim.ini 19045  2017-12-16

try\try.runs\.jobs\vrs_config_1.xml 228  2018-03-12

try\try.runs\.jobs\vrs_config_2.xml 228  2018-03-12

try\try.runs\.jobs\vrs_config_3.xml 228  2018-03-12

try\try.runs\.jobs\vrs_config_4.xml 228  2018-03-12

try\try.runs\c_addsub_0_synth_1\.vivado.begin.rst 188  2018-03-12

try\try.runs\c_addsub_0_synth_1\.vivado.end.rst 0  2018-03-12

try\try.runs\c_addsub_0_synth_1\.Vivado_Synthesis.queue.rst 0  2018-03-12

try\try.runs\c_addsub_0_synth_1\c_addsub_0.dcp 23622  2018-03-12

CodeBus www.codebus.net