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Title:
superSPI
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Category:
VHDL-FPGA-Verilog
Tags:
File Size:
1.46kb
Update:
2008-10-13
Downloads:
0 Times
Uploaded by:
chenrui1978
Description:
with AHDL prepared MAXPULS development. Communications from external clock rate and restriction on the number of data bytes.
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More information of uploader chenrui1978
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