Description: Based on Xilinx K7 series FPGA to achieve 5120*5120 resolution of 20 frames of DDR3 read and write, sent to the Hays 3559,HDMI display.
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File list (Check if you may need any files):
| Filename | Size | Date |
|---|
| test_ddr3\MIG_BURST_IMAGE.v | 15041 | 2021-03-29
|
| test_ddr3\test_image_no_AXI.v | 14497 | 2021-03-29
|
| test_ddr3 | 0 | 2021-03-29 |
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