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Title:
伪随机序列的说明和源代码
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Category:
VHDL-FPGA-Verilog
Tags:
[WORD]
File Size:
31.86kb
Update:
2008-10-13
Downloads:
0 Times
Uploaded by:
kurt_1969
Description:
controllable m-sequence generator, I divided into four small modules do, M, M1, M2, M3, respectively : m-sequence generator, controller, code-selector, code rate selector.
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