Search - 脉冲发生器

[Other resource] 双路脉冲发生器（veralog）

Description: Verilog HDL 程序双路脉冲发生器的代码包含了键盘控制，LED显示，脉冲发生，脉冲频率测量模块是我自己写得，希望能对你有帮助，有问题可以mail：shaojunwu1@163.com-Verilog HDL dual-channel pulse generator procedure code includes a keyboard control, LED display, pulse, pulse frequency measurement module is written I hope to help you, it can be mail : shaojunwu1@163.com
Platform: | Size: 4210 | Author: 邵君武 | Hits:

[Driver Develop] 脉冲发生器

Description: 脉冲发生器程序，LCD显示，键盘操作
Platform: | Size: 842687 | Author: lu_fu_ming@163.com | Hits:

[VHDL-FPGA-Verilog] 双路脉冲发生器（veralog）

[Other] Single_Pulse

Description: 单个脉冲发生器的multisim9仿真文件-single pulse generator simulation document multisim9
Platform: | Size: 282624 | Author: 欧阳菲菲 | Hits:

[VHDL-FPGA-Verilog] 9.1_ONE_PULSE

Description: 基于Verilog-HDL的硬件电路的实现 9.1 简单的可编程单脉冲发生器　　9.1.1 由系统功能描述时序关系　　9.1.2 流程图的设计　　9.1.3 系统功能描述　　9.1.4 逻辑框图　　9.1.5 延时模块的详细描述及仿真　　9.1.6 功能模块Verilog-HDL描述的模块化方法　　9.1.7 输入检测模块的详细描述及仿真　　9.1.8 计数模块的详细描述　　9.1.9 可编程单脉冲发生器的系统仿真　　9.1.10 可编程单脉冲发生器的硬件实现　　9.1.11 关于电路设计中常用的几个有关名词 -based on Verilog-HDL hardware Circuit of 9.1 simple programmable pulse generator 9.1.1 system functions described by the temporal flow chart 9.1.2 9.1.3 System Design Description logic diagram 9.1.5 9.1.4 Delay Module detailed description and simulation of 9.1. 6 functional modules Verilog-HDL description of the modular input method detection module 9.1.7 detailed 9.1.8 Description and Simulation module counting a detailed description 9.1.9 programmable pulse generator system 9.1.10 Simulation programmable pulse generator hardware on the circuit design 9.1.11 Constant Some of the terminology
Platform: | Size: 4096 | Author: 宁宁 | Hits:

[VHDL-FPGA-Verilog] 9.2_LCD_PULSE

Description: 基于Verilog-HDL的硬件电路的实现 9.2 具有LCD显示单元的可编程单脉冲发生器　　9.2.1 LCD显示单元的工作原理　　9.2.2 显示逻辑设计的思路与流程　　9.2.3 LCD显示单元的硬件实现　　9.2.4 可编程单脉冲数据的BCD码化　　9.2.5 task的使用方法　　9.2.6 for循环语句的使用方法　　9.2.7 二进制数转换BCD码的硬件实现　　9.2.8 可编程单脉冲发生器与显示单元的接口　　9.2.9 具有LCD显示单元的可编程单脉冲发生器的硬件实现　　9.2.10 编译指令-"文件包含"处理的使用方法 -based on Verilog-HDL hardware Circuit of 9.2 LCD display module with the series Single-Pulse Generator 9.2.1 LCD display module Principle 9.2.2 shows the logic design Thinking and Process 9.2.3 LCD display module hardware 9.2.4 programmable single pulse data BCD of the task 9.2.5 9.2.6 for the use of the phrase cycle use 9.2.7 binary conversion of BCD programmable hardware 9.2.8 single pulse generator with a said unit 9.2.9 interface with the LCD display module programmable pulse generator hardware 9 .2.10 compiler directives- "document includes" the use of
Platform: | Size: 5120 | Author: 宁宁 | Hits:

[assembly language] manchongfashen

Description: 实验24-脉冲信号发生器实验参考程序,基于PIC16F877A-experimental 24-pulse generator experimental reference program, based on PIC16F877A
Platform: | Size: 3072 | Author: 徐强 | Hits:

[SCM] Pulser

Description: 用STC单片机开发的简单脉冲发生器,用来测试步进驱动器.-With STC to develop a simple single-chip pulse generator, to test the stepper drive.
Platform: | Size: 25600 | Author: 马文杰 | Hits:

[SCM] digital_cymometer

Description: 简易数字频率计利用复杂可编程逻辑器件FPGA,VHDL编程将所有功能模块集成在一块芯片上。功能模块包括时基脉冲发生器、计数器、数据锁存器和显示电路4部分。设计时先分别设计各功能模块，并调试得到正确仿真结果，然后将各个功能模块组合起来。最后作整体仿真、下载，得到实物。由于采用纯数字硬件设计制作，稳定性、可靠性远远高于使用单片机或模拟方式实现的系统，外围电路简单。该数字频率计达到预期要求，实现了可变量程测量，测量范围0.1Hz—9999MHz，精度可达0.1Hz。-Simple digital frequency meter using complex programmable logic device FPGA, VHDL programming integration of all functional modules on a single chip. Functional modules, including time-base pulse generator, counters, and display data latch circuit 4. Design before the design of various functional modules, respectively, and debugging simulation results correctly, and then combine the various functional modules. Finally, for the overall simulation, download, be kind. As a result of the production of digital hardware design, stability, reliability is far higher than the use of single-chip microcomputer or analog means of the system, a simple peripheral circuits. The digital frequency meter to achieve the desired requirements of the variable-range measurement, measuring range 0.1Hz-9999MHz, accuracy up to 0.1Hz.
Platform: | Size: 412672 | Author: 严术骞 | Hits:

[uCOS] maichong

Description: 模拟脉冲发生器,带LCD显示,可以做为电能表测试用-Simulation of pulse generator, with LCD display, can be used as energy meter test
Platform: | Size: 1024 | Author: 池晓 | Hits:

[Other] pulse

Description: 脉冲发生器，可实现脉宽和幅度的任意调节。相信对大家有用。-Pulse generator, pulse width and amplitude can realize arbitrary regulation. I believe it useful to everyone.
Platform: | Size: 514048 | Author: sdcsadf | Hits:

[SCM] ONE_PULSE_LCD

Description: 具有LCD显示单元的可编程单脉冲发生器的硬件实现-LCD display unit with a single programmable pulse generator hardware realize
Platform: | Size: 180224 | Author: jinfei | Hits:

[VHDL-FPGA-Verilog] single

Description: verilog 我自己写得按单脉冲发生器，通过了综合和仿真，和频率可变的正弦波发生器，-verilog I write by a single pulse generator, through the synthesis and simulation, and variable frequency sine wave generator,
Platform: | Size: 1024 | Author: 潘见 | Hits:

[SCM] carp

Description: 采用PIC16F675制作的脉冲发生器，原用于驾校课时作弊。-PIC16F675 produced using pulse generator, the original驾校class for cheating.
Platform: | Size: 5120 | Author: ycchn | Hits:

[File Format] pulse_generator

Description: 本文件时关于脉冲发生器的设计-This document on the design of pulse generator
Platform: | Size: 6144 | Author: 靖书磊 | Hits:

[VHDL-FPGA-Verilog] mcfsqdsp3

Description: 一种脉冲发生器的实现，可用于PWM控制中-The realization of a pulse generator can be used for PWM control
Platform: | Size: 1024 | Author: gcm | Hits:

[Embeded-SCM Develop] pusle-generator

Description: 根据Jean J. Labrosse的dio嵌入式构件，自己编写的一个脉冲发生器。结构简洁，注释清晰，可供编程者参考。-According to Jean J. Labrosse embedded component of the dio, I have written a pulse generator. Simple, clear notes for programming reference.
Platform: | Size: 11264 | Author: zhuxiaosan | Hits:

[VHDL-FPGA-Verilog] maichong2

Description: 长度可以控制的脉冲发生器，实际使用过，VHDL编写，放心下载-pulse generator,good choice.
Platform: | Size: 1024 | Author: 吴次仁 | Hits:

[SCM] 时序脉冲发生器

Description: 本程序由AVR ATmega16单片机运行实现以下功能，触发时间范围100ms~5min,触发周期10ms~50min,触发通道1~12通道任意可调，广泛运用在工业脉冲阀控制器中，能够全面运用在各类脉冲控制场合。(This program is run by AVR ATmega16 microcontroller to achieve the following functions, trigger time range of 100ms~5min, trigger cycle 10ms~50min, trigger channel 1~12 channel arbitrary adjustable, widely used in industrial pulse valve controller, can be fully used in various pulse control occasions.)
Platform: | Size: 55296 | Author: 老茂 | Hits:

[VHDL-FPGA-Verilog] 基于FPGA的多路同步脉冲发生器设计1

Description: 采用FPGA（现场可编程门序列）编写VHDL语言设计多路同步脉冲发生器，对信号进行分频处理，实现四路信号相位相差T/16和T/8的延迟相位输出，实现的四路脉冲与传统的脉冲同步器不同，它具有高集成度，高通用性，容易调整和高可靠性等特点。(Using FPGA (field programmable gate sequence) to write VHDL language to design multi-channel synchronous pulse generator, to divide the frequency of the signal, to achieve the four-way signal phase difference T / 16 and T / 8 delay phase output, the realization of the four-way pulse is different from the traditional pulse synchronizer, it has the characteristics of high integration, high-throughput, easy adjustment and high reliability.)
Platform: | Size: 10240 | Author: 哈哈哈哈daxiao | Hits:

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