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[DSP programFFT(16点)

Description: 这是一个16点FFT(快速傅立叶变换)的C语言程序,用来对模拟信号处理-This is a 16 point FFT (Fast Fourier Transform) to the C language program, used to analog signal processing
Platform: | Size: 2048 | Author: 王海滨 | Hits:

[VHDL-FPGA-Verilogyouxiufft

Description: 16点的fft程序.非常不错,编译已经实现,还是很好的-16:00 fft the procedure. Very good, compilers have achieved, or good
Platform: | Size: 293888 | Author: 席鹏飞 | Hits:

[VHDL-FPGA-Verilog102416FFTVHDL

Description: 1024点,16位FFT VHDL 程序。1024点,16位FFT VHDL 程序-1024, 16 FFT VHDL procedures. 1024, 16 FFT VHDL procedures
Platform: | Size: 17408 | Author: 肖建华 | Hits:

[VHDL-FPGA-Verilog16Point-radix4-FFT

Description: 本文提出一個根值4 蝴蝶元素使用(m, n) - 櫃臺減少硬體複雜, 延遲時間, 和電力消費被介入在使用常規加法器。並且一臺修改過的換向器為FFT 算法被描述與用管道運輸的實施一起為連續輸入資料減少資料記憶要求。-This paper presents a root element of the use of 4 Butterfly (m, n)- the counter to reduce the hardware complexity, latency, and power consumption has been involved in the use of conventional adder. And a modified commutator for the FFT algorithm has been described with the use of pipeline transportation for the implementation of continuous input data together with information to reduce memory requirements.
Platform: | Size: 3072 | Author: 旻倫 | Hits:

[VHDL-FPGA-Verilogfft

Description: 16卫浮点FFT算法的VHDL实现,有测试文件。-16 floating-point FFT algorithm Wei VHDL realize, have the test paper.
Platform: | Size: 418816 | Author: | Hits:

[VHDL-FPGA-VerilogFFT-FPGA

Description: 16位定点FFT-DSP的FPGA实现,相关代码和实用说明-16-bit fixed-point FFT-DSP realize the FPGA, the relevant code and practical description
Platform: | Size: 3834880 | Author: 杨合 | Hits:

[VHDL-FPGA-Verilog16Point-FFT

Description: 16点FFT VHDL源程序,The xFFT16 fast Fourier transform (FFT) Core computes a 16-point complex FFT. The input data is a vector of 16 complex values represented as 16-bit 2’s complement numbers – 16-bits for each of the real and imaginary component of a datum.-16:00 FFT VHDL source code, The xFFT16 fast Fourier transform (FFT) Core computes a 16-point complex FFT. The input datais a vector of 16 complex values represented as 16-bit 2 s complement numbers- 16-bits foreach of the real and imaginary component of a datum.
Platform: | Size: 1824768 | Author: qiyuan | Hits:

[DSP programfft

Description: Tiger sharec系列DSP的短点FFT代码(4,6,8,16点FFT),全汇编实现,将DSP的性能发挥到极致,在超高实时要求应用下有意义.-Tiger sharec Series DSP short point FFT code (4,6,8,16-point FFT), the entire compilation of the realization of the performance of the DSP to the limit, in the ultra-high real-time requirements of applications under the meaningful.
Platform: | Size: 5120 | Author: 赵赵 | Hits:

[VHDL-FPGA-VerilogFFT-vhdl

Description: vhdl 16 FFT -vhdl 16 FFT
Platform: | Size: 29696 | Author: 123456 | Hits:

[2D Graphicfft

Description: The fft.c file is C code for a function to compute the 16 point real Fast Fourier Transform using the split radix algorithm. -The fft.c file is C code for a function to compute the 16 point real Fast Fourier Transform using the split radix algorithm.
Platform: | Size: 2048 | Author: 郭曉詠 | Hits:

[assembly languageFFT

Description: 本程序是基于C54x DSP的通用实数FFT程序,适合点数16~1024点或复数点数8~512点,主程序为rfft.asm。-This procedure is based on the C54x DSP real FFT common procedures, for points 16 ~ 1024 points, or plural points 8 ~ 512 points, the main program for rfft.asm
Platform: | Size: 31744 | Author: dazhou | Hits:

[Algorithmfft

Description: FFT算法实现 Radix2 可以计算 4,8,16,32, 64,128, 256....点FFT Radix4 可以计算 4,16, 64, 256, 1024...点FFT FFT_DIT_general.c 实现了 Radix2 和Radix4 的配合使用,可以计算Radix2可以计算的所有FFT,但效率比Radix2高。-FFT can be calculated Radix2 algorithm 4,8,16,32, 64,128, 256 .... can calculate the FFT Radix4 points 4,16, 64, 256, 1024-point FFT FFT_DIT_general.c ... Radix2 and Radix4 achieved with the use of Radix2 can calculate can calculate all the FFT, but Radix2 high efficiency.
Platform: | Size: 2048 | Author: liuxiaoxiao | Hits:

[Algorithmfft

Description: System C实现的16点定点fft计算模型。-System C fixed-point to achieve the 16 point calculation model fft.
Platform: | Size: 9265152 | Author: 王达山 | Hits:

[SCMFFT

Description: msp430 1611 功能,256点FFT运算,还有一个失真度计算,结果正确,硬件使用结果正确 IAR平台-msp430 1611 features, 256-point FFT computation, there is a distortion, the result is correct, the use of the results of the correct hardware platform IAR
Platform: | Size: 1024 | Author: 何少 | Hits:

[Embeded-SCM Developfft-arm

Description: 一个用于ARM的基4/基5定点FFT算法,原作者是JDB,后来我扩展过16和256点的计算并用在项目中了,感觉速度还不错。现在重写了基于Linux GCC4的测试程序,可供使用者评估参考。建议安装FFTW3用来精确评估测试结果,相关范例已经在代码中了。-Radix 4/5 FFT routines supporting 16/64/256 and 20/80 calculations. The source originally contributed by JDB, I had extended 16 and 256 candidates and used it in our project it has been verified as fast and stable. Now we add some test vectors running on Linux with GCC 4 for testers who want to use or just evaluate it. Installing FFTW3 is recommended for evaluating the code exactly.
Platform: | Size: 242688 | Author: Tony Gibson | Hits:

[Algorithmfft

Description: 16 point 4 radix fft vhdl
Platform: | Size: 2048 | Author: gwangja | Hits:

[VHDL-FPGA-Verilogfft16_vhdl

Description: 16位FFT,含测试,VHDL,浮点FFT算法-FFT-16,VHDL
Platform: | Size: 437248 | Author: 杜杜 | Hits:

[matlabradix4

Description: This zip file describes about Basic radix 2fft,radix 4fft and shows the basic difference between above mentioned fft with radix 16 fft-This zip file describes about Basic radix 2fft,radix 4fft and shows the basic difference between above mentioned fft with radix 16 fft
Platform: | Size: 88064 | Author: vivek | Hits:

[VHDL-FPGA-VerilogHigh-Speed-FFT

Description: 优秀硕士论文,课题采用现场可编程门阵列((FPGA),设计实现了一种超高速FFT处理器。目前,使用FPGA实现FFT多采用基2和基4结构,随着FPGA规模的不断扩大,使采用更高基数实现FFT变换成为可能。本课题就是采用Alter的Stratix II芯片完成了基16-FFT处理器的设计。在设计实现过程中,以基2-FFT搭建基16-FFT的运算核,合理安排时序,解决了碟形运算、数据传输和存储操作协调一致的问题。由于采用流水线工作方式,使整个系统的数据交换和处理速度得以很大提高。本设计实现了4096点和256点的变换,两个内部运算时钟都可以达到1 OOMHz以上,其中256点变换的数据吞吐率高达1.36GHz -a design of ultra high speed FFT processor based onFPGA is developed in this paper. At present we always use radix-2 and radix-4 tocarry out FFT. When the scale of FPGA is panding,it s possible to implement higher radix FFT. This topic uses Stratix II of Altera company to carry out a processor of radix一16 FFT.In this design, radix-16 FFT is carried out by radix-2FFT, The design uses rational time sequence arrangement to make butterflycomputing,data transformation and memory coincide.In order to avoid the bottleneck,pipeline pattern is used,this method acceletates the operating.Thescheme realizes the 4096-points and 256-points FFT, their operation clocks canboth reach above 100MHz. Among them ,the throughput of 256-points FFT is up to1.36GHz.
Platform: | Size: 3759104 | Author: 陈子牙 | Hits:

[Algorithm16-fft-hdl

Description: 16点fft,其中实现简单,使用的是基4的结构,控制使用状态机-based-16 FFt
Platform: | Size: 2048 | Author: 张剑锋 | Hits:
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