Location:
Search - 16 instruction
Search list
Description: PIC18指令集中文介绍，详细介绍了microchip刚推出的16位哈拂结构，更大存储空间，RAM分页/段管理的单片机的指令使用-PIC18 Chinese instruction set, introduced in detail Microchip recently launched 16 Harvard structure, greater storage space, RAM Pagination / SCM management of the use of the directive
Platform: |
Size: 97267 |
Author: 叶秋香 |
Hits:
Description: Instruction Set
Manual
for the C166 Family of
Infineon 16-Bit Single-Chip
Microcontrollers-Instruction Set Manual for the C166 Family of Infineon 16-Bit Single-Chip Microcontrollers
Platform: |
Size: 948616 |
Author: 杨百涛 |
Hits:
Description: 一．高精度延时, 是 CPU 测速的基础
Windows 内部有一个精度非常高的定时器, 精度在微秒级, 但不同的系统这个定时器的频率不同, 这个频率与硬件和操作系统都可能有关。
利用 API 函数 QueryPerformanceFrequency 可以得到这个定时器的频率。
利用 API 函数 QueryPerformanceCounter 可以得到定时器的当前值。
根据要延时的时间和定时器的频率, 可以算出要延时的时间定时器经过的周期数。
在循环里用 QueryPerformanceCounter 不停的读出定时器值, 一直到经过了指定周期数再结束循环, 就达到了高精度延时的目的。
高精度延时的程序, 参数: 微秒
二．测速程序
利用 rdtsc 汇编指令可以得到 CPU 内部定时器的值, 每经过一个 CPU 周期, 这个定时器就加一。
如果在一段时间内数得 CPU 的周期数, CPU工作频率 = 周期数 / 时间
为了不让其他进程和线程打扰, 必需要设置最高的优先级
以下函数设置当前进程和线程到最高的优先级。
SetPriorityClass(GetCurrentProcess(), REALTIME_PRIORITY_CLASS)
SetThreadPriority(GetCurrentThread(), THREAD_PRIORITY_TIME_CRITICAL)
CPU 测速程序的源代码, 这个程序通过 CPU 在 1/16 秒的时间内经过的周期数计算出工作频率, 单位 MHz:
-one. High-precision delay, the CPU speed is the basis of Windows within a very high accuracy of the timer, the microsecond precision, but in the system timer different frequencies, the frequency and hardware and the operating system are likely. Using API function can be QueryPerformanceFrequency the timing The frequency. Use QueryPerformanceCounter API function can be the current timer value. According to the delay time and the frequency of the timer, you could calculate the time to delay timer after a few cycles. The circle with QueryPerformanceCounter repeatedly read out the timer value, until after a specified number of cycles end the cycle again, it reached a high precision delay purposes. High-precision delay the procedure parameters : 2 microsecond. Gun utilize RDTSC instruction can
Platform: |
Size: 1213 |
Author: 马俊 |
Hits:
Description: 五部分，第一部分介绍 32位浮点处理器SHARC系列ADSP-2106X的硬件结构及其主要特征、指令系统、汇编语言和C语言程序设计方法。第二部分介绍ADI公司的16位定点处理器 ADSP-218X系列的硬件结构及其主要特征、指令系统、汇编语言和C语言程序设计方法。第三部分介绍VisualDSP++的特点和集成开发调试环境（IDDE）使用方法。第四部分介绍SHARC EZ-KIT和ADSP-218X EZ-KIT的特点、功能及其使用技巧。第五部分介绍DSP在数字信号处理中的应用，给出了大量的实验-5, the first part gives 32-bit floating point processor SHARC family, the ADSP-2106X the hardware structure and its main features instruction, assembly language and C language programming method. The second part of ADI introduced the 16-bit fixed-point processor ADSP-218X series of hardware architecture and its main features instruction, assembly language and C language programming method. The third section presents the characteristics and VisualDSP integrated development debugging environment (IDDE) use. The fourth part gives SHARC EZ-KIT and ADSP-218X EZ-KIT characteristics, Function and use skills. The fifth section presents DSP digital signal processing applications, is a lot of experiments
Platform: |
Size: 3044352 |
Author: 刘宏 |
Hits:
Description: 关于凌阳16位单片机编程的pdf文档，里面包含了指令集和硬件说明-About Sunplus 16-bit single-chip programming pdf document, which contains the instruction set and hardware description
Platform: |
Size: 6674432 |
Author: tianxia |
Hits:
Description: 8位CPU的VHDL设计,16条指令系统,以及部分测试代码,开发工具是quartusii_60_pc-8-bit CPU of the VHDL design, 16 instruction, as well as some of the test code, development tools is quartusii_60_pc
Platform: |
Size: 3072 |
Author: FJ |
Hits:
Description: 200-MHz ARM920T Processor
• 16-kbyte Instruction Cache
• 16-kbyte Data Cache
• Linux® , Microsoft® Windows® CE-enabled MMU
• 100-MHz System Bus
• MaverickCrunch™ Math Engine
• Floating Point, Integer, and Signal Processing
Instructions
• Optimized for digital music compression and
decompression algorithms.
• Hardware interlocks allow in-line coding.
• MaverickKey™ IDs
• 32-bit Unique ID can be used for DRM-compliant
128-bit random ID.
• Integrated Peripheral Interfaces
• 32-bit SDRAM Interface-200-MHz ARM920T Processor • 16-kbyte Instruction Cache • 16-kbyte Data Cache • Linux ® , Microsoft ® Windows ® CE-enabled MMU • 100-MHz System Bus • MaverickCrunch ™ Math Engine • Floating Point, Integer, and Signal Processing Instructions • Optimized for digital music compression and decompression algorithms. • Hardware interlocks allow in-line coding. • MaverickKey ™ IDs • 32-bit Unique ID can be used for DRM-compliant 128-bit random ID. • Integrated Peripheral Interfaces • 32-bit SDRAM Interface
Platform: |
Size: 556032 |
Author: zhanglong |
Hits:
Description: 课程
1005 GS5 : Microchip的16位产品入门
课程简介
这个动手实验课涵盖了16位产品的架构和指令集的基础内容，并通过实际编写简单的汇编程序进一步深入和强化。学员
将在Explorer 16开发板上进行编程，点亮和闪烁一个LED灯。16位产品的其他特性也将会一一得到讲解并通过程序得
到验 证，比如多重中断向量、中断优先级及程序存储空间可视性（PSV）等等。采用的硬件是带有dsPIC30F6014的
Explorer 16开发板。完成本课程后，学员将基本了解和熟悉PIC24和dsPIC30。
-Course 1005 GS5: Microchip' s 16-bit product brief introductory courses covering the hands-class products of the 16-bit instruction set architecture and the basis of content, and through the actual preparation of a compilation of simple procedures and to strengthen further. Participants will board the Explorer 16 development program, a LED lighting and flashing lights. 16 products in 11 other properties will also be explained and verified through the procedures, such as multiple interrupt vector, Interrupt Priority and procedures for storage space visibility (PSV) and so on. Hardware is used with dsPIC30F6014 the Explorer 16 development board. After completion of this training course, participants will be familiar with the basic understanding and PIC24 and dsPIC30.
Platform: |
Size: 635904 |
Author: lajie |
Hits:
Description: 实现一个16位CPU。该CPU使用精减指令集，是一个五段流水线的结构。包括取指令(IF)、读寄存器(RD)、运算器(ALU)、内存读写(MEM)和写回(WB)。-The realization of a 16-bit CPU. Streamline the use of the CPU instruction set is a structure of five lines. Including fetch (IF), register read (RD), arithmetic logic unit (ALU), memory read and write (MEM) and Write Back (WB).
Platform: |
Size: 6144 |
Author: 周健 |
Hits:
Description: 用Quartus II 设计的3级流水CPU，指令采用二次重叠执行方式-Quartus II design with three-stage pipeline CPU, instruction execution overlaps with the second time
Platform: |
Size: 3028992 |
Author: kevin |
Hits:
Description: MANIK is a 32 bit RISC Microprocessor. The salient features of the processor are listed
below.
Features
Hardware Features
• Data Path Width 32 bits, with Four stage pipeline.
• Mixed 16/32 bit instructions for code density
• Von Neumann Architecture (Data and Instruction in the same
address space).
• Sixteen, 32 bit General Purpose Registers.
• Four USER defined instructions (with Register File Write back
capability).-MANIK is a 32 bit RISC Microprocessor. The salient features of the processor are listed
below.
Features
Hardware Features
• Data Path Width 32 bits, with Four stage pipeline.
• Mixed 16/32 bit instructions for code density
• Von Neumann Architecture (Data and Instruction in the same
address space).
• Sixteen, 32 bit General Purpose Registers.
• Four USER defined instructions (with Register File Write back
capability).
Platform: |
Size: 3395584 |
Author: hfayed |
Hits:
Description: 详细介绍了如何设计一个简单的16位cpu.其中包含了从最基础的指令系统开始到最复杂的cu控制器的设计思路，方案.最后还介绍了一些有关vhdl语言的用法,并给出了具体的cpu部件的vhdl代码,从而帮助大家更为深刻的学习如何设计一个简单的cpu-Described in detail how to design a simple 16-bit cpu. Which contains the most basic instruction from the beginning to the most complex cu controller design ideas, program. Finally the author describes some of the vhdl language usage, and gives vhdl cpu specific parts of the code to help you more deeply to learn how to design a simple cpu
Platform: |
Size: 1051648 |
Author: 罗高 |
Hits:
Description: 本节介绍x86系列处理器定义的数据类型。
x86系列处理器的基本数据类型是字节、字、双字、四字和双四字，如图3-1所示。
一个字节是8位，一个字是两个字节（16位），双字是4字节（32位），四字是8字节（64位），双四字是16字节（128位）。
四字是在Intel 80486处理器中引入IA-32 结构的，双四字是在具有SSE扩展的Pentium Ⅲ 处理器中引入的。
-This section describes the x86 series processors defined data types. x86 family of processors, the basic data types are byte, word, double words, four words and two words have, as shown in Figure 3-1. A byte is 8 bits, a word is two bytes (16 bits), double word is 4 bytes (32 bits), four words are 8 bytes (64 bits), double four characters is 16 bytes (128 bit). Four characters are introduced in the Intel 80486 processor IA-32 structure, two-four characters in a SSE extensions introduced Pentium Ⅲ processor.
Platform: |
Size: 920576 |
Author: 谢沂廷 |
Hits:
Description: 给定指令系统的处理器设计,指令字长16位，包含10种操作-Given instruction processor design, 16-bit instruction word length, contains 10 kinds of operations
Platform: |
Size: 1090560 |
Author: 姜健 |
Hits:
Description: 用VHDL语言设计了一个含10条指令的RISC处理器。假定主存可以在一个始终周期内完成依次读写操作且和CPU同步，系统使用一个主存单元。处理器指令字长16位，包含8个通用寄存器，1个16位的指令寄存器和一个16位的程序记数器。处理器的地址总线宽度16位。数据总线宽度16位，取指和数据访问均在一跳蝻数据总线。处理器支持包含LDA，STA，MOV，MVI，ADD，SUB，AND，OR，JZ，JMP十条指令。其中仅有LDA和STA是访存指令。-VHDL language design with a RISC processor with 10 instruction. Assume that main memory can be completed in one cycle is always followed and the CPU read and write operations and the synchronization system uses a main memory unit. 16-bit instruction word processor, including 8 general purpose registers, a 16-bit instruction register and a 16-bit program counter. Processor' s address bus width 16 bits. 16-bit data bus width, fetch and data access are in the hop hoppers data bus. Processor support includes LDA, STA, MOV, MVI, ADD, SUB, AND, OR, JZ, JMP ten instructions. LDA and STA is the only one memory access instructions.
Platform: |
Size: 1076224 |
Author: zhaoshu |
Hits:
Description: 在quartus中运行的32位指令集的16位CPU程序，模块化设计，包括MBR, BR, MR, ACC, MAR, PC, IR, CU, ROM, RAM, ALU等模块-In the the quartus run 32 16-bit CPU instruction set procedures, modular design, including the MBR, BR, MR, the ACC, the MAR, the PC, the IR CU, the ROM, RAM, ALU and other modules
Platform: |
Size: 1651712 |
Author: |
Hits:
Description: code for 16 bit instruction memory
Platform: |
Size: 1024 |
Author: tarunsharma |
Hits:
Description: VHDL语言制作CPU，8位，16条指令，能够完成多种操作. -VHDL language production CPU, 8-bit, 16 instruction, to complete a variety of operations. VHDL language with CPU, 8-bit, 16 instruction, to complete a variety of operations.
Platform: |
Size: 7880704 |
Author: zhangwei |
Hits:
Description: 迪文屏OS指令实现MODBUS协议,实现03,16指令,官网都没有的,网上很少有介绍迪文OS的,很实用哦,QQ1091331953-Devine OS screen instructions to achieve MODBUS protocol for 03,16 instruction, the official website did not, few online presentation Devin OS, it is practical Oh, QQ1091331953
Platform: |
Size: 4096 |
Author: 方海钰 |
Hits:
Description: LCD1602实现字符显示，通过stc单片机控制lcd1602显示相应的字符，并且有相关lcd1602的设定，通讯指令，数据传送指令。-LCD1602 character display realized by stc MCU control lcd1602 display the appropriate characters, and relevant lcd1602 setting, communication instruction, data transfer instruction.
Platform: |
Size: 21504 |
Author: 刘一一 |
Hits: