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[Other resourceALU

Description: 用verilog编写的32位alu部件,用于cpu制作
Platform: | Size: 3377 | Author: 胡豫陇 | Hits:

[MPI类sc

Description: 该文件以systemc为核心建立了32位alu,仅供参考-the document to SystemC as the core, a 32-bit ALU, is for reference only
Platform: | Size: 1302528 | Author: asao | Hits:

[Embeded-SCM DevelopATmega128L

Description: ATmega128L单片机 数据手册 ATmega128L微控制器,它是采用低功耗COMS工艺生产的基于RISC结构的8位微控制器,是目前AVR系列中功能最强大的单片机。AVR核将32个工作寄存器和丰富的指令集联结在一起,所有的工作寄存器都与ALU直接相连,实现了在一个时钟周期内执行单条指令的同时访问两个独立寄存器的操作,具有良好的性价比。-ATmega128L SCM manual data ATmega128L microcontrollers, it is using low-power CMOS technology, the RISC-based structure of the 8-bit microcontroller. AVR is the series most powerful MCU. AVR nuclear work will be 32 registers and rich instruction set connected, all the registers are directly connected with ALU, to achieve the implementation of sorts in a single instruction at the same time to visit two independent register operation, good value.
Platform: | Size: 2912256 | Author: 刘天 | Hits:

[VHDL-FPGA-Verilogalu_32_bit

Description: verilog 32-bit ALU-verilog 32-bit ALU
Platform: | Size: 2048 | Author: qwasqwas | Hits:

[VHDL-FPGA-VerilogALU

Description: 用verilog编写的32位alu部件,用于cpu制作-Prepared using Verilog 32 alu parts, used cpu production
Platform: | Size: 3072 | Author: 胡豫陇 | Hits:

[VHDL-FPGA-VerilogCPU

Description: 使用verilog作为CPU设计语言实现单数据通路五级流水线的CPU。具有32个通用寄存器、一个程序计数器PC、一个标志寄存器FLAG,一个堆栈寄存器STACK。存储器寻址粒度为字节。数据存储以32位字对准。采用32位定长指令格式,采用Load/Store结构,ALU指令采用三地址格式。支持有符号和无符号整数加、减、乘、除运算,并支持浮点数加、减、乘、除四种运算,支持与、或、异或、非4种逻辑运算,支持逻辑左移、逻辑右移、算术右移、循环右移4种移位运算,支持Load/Store操作,支持地址/立即数加载操作,支持无条件转移和为0转移、非0转移、无符号>转移、无符号<转移、有符号>转移、有符号<转移等条件转移。
Platform: | Size: 43008 | Author: haotianr | Hits:

[Software Engineering07302529

Description: 计算机组成原理实验(MAX PLUS) 1.ALU设计 2.MEM设计 3.32位2选1选择器-Principles of Computer Organization Experiment (MAX PLUS) 1.ALU design 2.MEM design 3.32 2 election 1 selector
Platform: | Size: 244736 | Author: 翁浩达 | Hits:

[VHDL-FPGA-VerilogALU_ise10migration

Description: It s vhdl source code for 32 bit ALU.
Platform: | Size: 76800 | Author: Abhishek Baranwal | Hits:

[VHDL-FPGA-Verilogalu

Description: 这是32位alu的代码,使用verilog写的,包含了简单的运算功能-This is a 32-bit alu code, use verilog to write, and includes a simple arithmetic functions
Platform: | Size: 1024 | Author: 杨恋 | Hits:

[VHDL-FPGA-Verilogalu_32_bit

Description: 一个Verilog语言写的32位ALU的源码。-A language written in Verilog source code for a 32-bit ALU.
Platform: | Size: 2048 | Author: sunny | Hits:

[Windows DevelopALU_32

Description: 32 bit ALU design,LU Operations: This input specifies the ALU operation to be used during the acquisition process. The ALU operations are divided into logical operations and two classes of arithmetic operations. The two classes of arithmetic operations vary in how the CARRYIN register on the frame grabber card is set. A list of the 48 operations is given below:
Platform: | Size: 1024 | Author: madhawa | Hits:

[OtherALU

Description: alu设计,实现三十二位计算,包括加法和减法,以及与,或,异或等-design of alu,alu design, implement 32, including both the addition and subtraction, as well as AND, OR, XOR, etc
Platform: | Size: 2048 | Author: xuyajun | Hits:

[VHDL-FPGA-VerilogALUALUcontrol

Description: 实现32位的ALU,使其能够支持基本的指令。用Verilog HDL语言或VHDL语言来编写,实现ALU及ALU控制器。 -To achieve 32-bit ALU, so that it can support the basic directives. With the Verilog HDL language or VHDL language to write, implement ALU and the ALU controller.
Platform: | Size: 1060864 | Author: 于伟 | Hits:

[Embeded-SCM DevelopVHDLmipsPipeline

Description: 32 位MIP流水线CPU设计,5 stage,代码详细,包括ALU,存储器,寄存器等,是个很不错的CPU设计-32 MIP pipelined CPU design, 5 stage, the code in detail, including the ALU, memory, registers, etc. is a very good CPU design
Platform: | Size: 561152 | Author: suborong | Hits:

[Other32Bitaludesign

Description: Design of simple 32 bit alu for SPARTAN 3 paltform
Platform: | Size: 1024 | Author: Ammankumar | Hits:

[VHDL-FPGA-VerilogCPU

Description: 32位5级流水线CPU设计指令系统、指令格式、寻址方式、寄存器结构、数据表示方式、存储器系统、运算器、控制器和流水线结构等-32bit pipeline CPU
Platform: | Size: 187392 | Author: znl | Hits:

[VHDL-FPGA-Verilogalu32bit

Description: verilog hdl alu module it is 32bit alu and 1bit alu
Platform: | Size: 368640 | Author: park | Hits:

[VHDL-FPGA-Verilogalu[1].eg1

Description: A 32-Bit ALU Design Example
Platform: | Size: 46080 | Author: vinoth | Hits:

[VHDL-FPGA-VerilogALU

Description: verilog硬件仿真,实现32-bit RISC微处理器的算数逻辑单仿真元(ALU),实现加减运算、逻辑运算、移位运算。仿真级别为RTL级。-verilog hardware simulation, to achieve 32-bit RISC microprocessor arithmetic logic one simulation element (ALU), to achieve addition and subtraction operations, logic operations, shift operations. RTL-level simulation level.
Platform: | Size: 3072 | Author: | Hits:

[GIS programalu

Description: 实现了四位快速加法器,并在此基础上实现了16位和32为快速加法器(Based on the implementation of four bit fast adder, 16 bit and 32-bit fast adders are realized)
Platform: | Size: 35840 | Author: 啊谬 | Hits:
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