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Description: Verilog HDL 编写的CY7C68013 SLAVE FIFO接口程序，实际测试可用。可以直接跟上位机连接，传输数据。
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Size: 665214 |
Author: huanghui |
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Description: Verilog HDL 编写的CY7C68013 SLAVE FIFO接口程序，实际测试可用。可以直接跟上位机连接，传输数据。-Verilog HDL prepared CY7C68013 SLAVE FIFO interface program, the actual test can be used. Keep pace with the digital machine can be directly connected to transmit data.
Platform: |
Size: 664576 |
Author: huanghui |
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