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Description: 1. 课程设计的任务
本次课程设计的任务是实现一个算术逻辑运算单元，使之能够完成不带进位位算术、逻辑八位二进制数的运算。由具有扩展能力强，结构简单清晰，连线方便快捷的总线结构作为系统结构。系统测试采用在系统的每个总线上设置测试孔。采用闪存存储数据，系统可以通过监测模块来修改和控制微程序的运行。
采用若干种类的芯片组作为运算器和数据输入输出缓冲、输入锁存器，其中2片74LS181构成8位字长的ALU单元是算术逻辑运算单元核心。
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Size: 795228 |
Author: xwy1985s |
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Description: 算术逻辑运算器单元ALU（74LS181）的工作原理。简单运算器的的数据传送通道。验算由74LS181等组合逻辑电路组成的运算功能发生器运算功能。
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Size: 27850 |
Author: 朱旭浩 |
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Description: 1. 课程设计的任务
本次课程设计的任务是实现一个算术逻辑运算单元，使之能够完成不带进位位算术、逻辑八位二进制数的运算。由具有扩展能力强，结构简单清晰，连线方便快捷的总线结构作为系统结构。系统测试采用在系统的每个总线上设置测试孔。采用闪存存储数据，系统可以通过监测模块来修改和控制微程序的运行。
采用若干种类的芯片组作为运算器和数据输入输出缓冲、输入锁存器，其中2片74LS181构成8位字长的ALU单元是算术逻辑运算单元核心。
-1. The task of curriculum design curriculum design of this task is the realization of an arithmetic logic operation unit, so that it can not be brought into complete bit-bit arithmetic, logic 8 binary arithmetic. Expansion of capacity by a strong, clear and simple structure, convenient bus connection structure as the system architecture. System test bus in the system set up for each test hole. Store data using flash memory, the system can monitor the module to modify and control the operation of micro-procedures. The use of certain types of chipsets as a computing device and data input and output buffering, input latch, which constitute two 74LS181 word length of 8 is the arithmetic logic unit ALU FPU core.
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Size: 794624 |
Author: xwy1985s |
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Description: 算术逻辑运算器单元ALU（74LS181）的工作原理。简单运算器的的数据传送通道。验算由74LS181等组合逻辑电路组成的运算功能发生器运算功能。
-Arithmetic logic operation unit ALU (74LS181) works. Simple arithmetic logic unit of the data transmission channel. 74LS181 checked by the combinational logic circuit, such as computing functions comprising computing function generator.
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Size: 27648 |
Author: 朱旭浩 |
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Description: 设计带进位算术逻辑运算单元，根据74LS181功能表，用Verilog HDL硬件描述语言编程实现ALU181的算术逻辑运算功能，编辑实验原理图，在算术逻辑单元原理图上，将其扩展为带进位的算术逻辑运算单元，对其进行编译，并设计波形对其进行仿真验证，最后下载验证-Design into the digital arithmetic logic operation unit, in accordance with menu 74LS181 with Verilog HDL hardware description language programming ALU181 function arithmetic logic operations, editing Experimental schematic diagram, in the Arithmetic Logic Unit schematic diagram on its expansion into the spaces for arithmetic logic operation unit, its compiler, and the design of their simulation waveforms, and finally download the verification
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Size: 667648 |
Author: 623902748 |
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Description: 4 bit alu to replace a 74LS181
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Size: 1024 |
Author: TS |
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Description: ALU 74LS181 source code - c-ALU 74LS181 source code - c++
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Size: 3072 |
Author: Elham |
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Description: 验证74LS181运算和逻辑功能的电路图-To verify the the 74LS181 computation and the circuit diagram of the logic function
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Size: 175104 |
Author: 虾仔 |
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Description: 1、掌握运算器的数据传输方式。
2、掌握74LS181的功能和应用。
3、学习并掌握利用CPLD器件通过原理图进行算术逻辑单元的设计。
1、完成16位不带进位位算术、逻辑运算实验。按照实验步骤完成实验项目，了解算术逻辑运算单元的运行过程。
2、通过原理图配置EPM7128的内部电路结构，使其替代分离的算术逻辑运算单元的设计。
-A master computing device data transmission. 2, to grasp the features and applications of the 74LS181. To learn and master the use of the CPLD device through the schematic design of the arithmetic logic unit. 1 to complete the 16 into a bit arithmetic and logic operations experiments. Completion of the pilot project, in accordance with the experimental procedures and understanding of arithmetic and logic unit is running. 2, the schematic configuration the EPM7128 the internal circuit structure it to replace the design of the separation of arithmetic and logic unit.
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Size: 1361920 |
Author: 冷色系绝恋 |
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Description: quartus ii 13.0 based,74181 vhdl code implementation
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Size: 2112512 |
Author: cccwe1
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