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Description: An AHB system is made of masters slaves and interconnections. A general approach to include all possible \"muxed\" implementation of multi layered AHB systems and arbitrated AHB ones can be thought as an acyclic graph where every source node is a master, every destination node is a slave and every internal node is an arbiter there must
be one and only one arc exiting a master and one or more entering a slave (single slave verus multi-slave or arbitrated slave) an arbiter can have as many input and output connections as needed. A bridge is a special node that collapses one or more slave nodes and a master node in a new \"complex\" node.
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Size: 268999 |
Author: 木石 |
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Description: An AHB system is made of masters slaves and interconnections. A general approach to include all possible "muxed" implementation of multi layered AHB systems and arbitrated AHB ones can be thought as an acyclic graph where every source node is a master, every destination node is a slave and every internal node is an arbiter there must
be one and only one arc exiting a master and one or more entering a slave (single slave verus multi-slave or arbitrated slave) an arbiter can have as many input and output connections as needed. A bridge is a special node that collapses one or more slave nodes and a master node in a new "complex" node.
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Size: 269312 |
Author: 木石 |
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Description: AMBA2.0标准的AHB2APb桥,代码通过验证-AMBA2.0 standard AHB2APb Bridge, through the verification code
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Size: 4096 |
Author: LIANG |
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Description: AMBA总线AHB TO AHB bridge-AMBA bus AHB TO AHB bridge
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Size: 2048 |
Author: xiaoheng |
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Description: arm ambm 2.0 primecell算法 ahb 与 apb通讯的转换模块-arm ambm 2.0 primecell algorithm ahb conversion and communications module apb
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Size: 2048 |
Author: sunk |
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Description: verilog code for apb to ahb convert
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Size: 1024 |
Author: peng |
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Description: ahb to pvci bridge, free code
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Size: 4096 |
Author: lai |
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Description: amba总线桥:ahb to asb!verilog hdl文档加代码,非常全,soc-amba bus bridge: ahb to asb! verilog hdl code for the document plus a very full, soc
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Size: 165888 |
Author: zhangyiyun |
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Description: 该源码包是2.0版本的AMBA总线的Verilog语言模型,主要包括5个部分:AHB总线仲裁器,AHB-APB总线桥接器,AHB总线上从设备ROM模型,AHB总线上从设备RAM模型,参数定义。-This source code package is the model of V2.0 AMBA bus of ARM company, It mainly includes the following five parts: the AHB arbiter,AHB-APB bridge, AHB_Rom_Slave, AHB_Ram_Slave,Defines.
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Size: 17408 |
Author: jinjin |
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Description: 该源代码包是AHB总线到Wishbone总线的交接器,包括以下4个部分:RTL源代码,测试平台,软件测试程序,说明文档。-This source package is the AHB bus to Wishbone bus bridge(wrapper).It has the following 4 parts: RTL codes, testbench, software simulating files, help documents.
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Size: 2077696 |
Author: jinjin |
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Description: AMBA Application Note: AN123 - Logic Tile IT1 GPIO example design.
-Application note AN123 provides all of the AHB slave features of AN119 with the addition of five 32bit AHB GPIO slaves. The GPIO interfaces are used to configure and test an IT1 board.
The following board combinations are supported:
Core Module+ Integrator/IM-LT1+ LT-XC2V6000+ IT1
Core Module+ Integrator/IM-LT1+ LT-XC2V8000+ IT1
Integrator/CP+ Core Module+ Integrator/IM-LT1+ LT-XC2V6000+ IT1
Integrator/CP+ Core Module+ Integrator/IM-LT1+ LT-XC2V8000+ IT1
PB926EJ-S+ LT-XC2V6000+ IT1
PB926EJ-S+ LT-XC2V8000+ IT1
Asynchronous and Synchronous bridge modes are supported on the PB926EJ-S with different design images. Asynchronous mode is selected using SW1[3] on the PB926EJ-S.
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Size: 4482048 |
Author: 余曉民 |
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Description: 倍频算法实现了AHB-to-APB桥接器-An ahb2apb bridge with doubling algorithm
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Size: 4096 |
Author: 韩苗菲 |
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Description: AHBtoAPB设计基于AMBA总线协议的APB Bridge设计-AHB to APB designThe AHB to APB bridge interface is an AHB slave. When accessed (in normal operation or system test) it initiates an access to the APB.
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Size: 114688 |
Author: 李雷 |
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Description: ahb总线到wishbone总线的桥接器,包括一个testbench,该版本暂不支持burst操作-A AHB master to WishBone slave bridge along with a basic testbench is included. Burst in not yet supported
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Size: 11264 |
Author: hxr |
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Description: AHB 总线规范是 AMBA 总线规范的一部分。AMBA 总线规范是 ARM 公司提出的总
线规范,被大多数 SoC 设计采用,它规定了 AHB(Advanced High-performance Bus)ASB
(Advanced System Bus)APB(Advanced Peripheral Bus)。AHB 用于高性能、高时钟频率的
系统结构,典型的应用如 ARM 核与系统内部的高速 RAM,Nand Flash,DMA,Bridge 的
链接。APB 用于连接外部设备,对性能要求不高,而考虑低功耗问题。ASB 是 AHB 的一种
替代方案,没有关注过它的使用,也没有见过其实际使用范例。因项目需要,阅读 AHB 总
线规范,并做读书笔记。-AHB(Advanced High-performance Bus)
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Size: 442368 |
Author: noctune |
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Description: ESP8266 WiFi SoC offers a complete and self-contained Wi-Fi networking solution it can be used to
host the application or to offload Wi-Fi networking functions another application processor.
When ESP8266 hosts the application, it boots up directly an external flash. In has integrated
cache to improve the performance of the system in such applications. Alternately, serving as a Wi-Fi
adapter, wireless internet access can be added to any microcontroller-based design with simple
connectivity through UART interface or the CPU AHB bridge interface.-ESP8266 WiFi SoC offers a complete and self-contained Wi-Fi networking solution it can be used to
host the application or to offload Wi-Fi networking functions another application processor.
When ESP8266 hosts the application, it boots up directly an external flash. In has integrated
cache to improve the performance of the system in such applications. Alternately, serving as a Wi-Fi
adapter, wireless internet access can be added to any microcontroller-based design with simple
connectivity through UART interface or the CPU AHB bridge interface.
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Size: 624640 |
Author: mayank |
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Description: PKUnity AHB-PCI Bridge Registers.
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Size: 1024 |
Author: 影剧院 |
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Description: AMBA总线的Verilog语言模型,主要包括5个部分:AHB总线仲裁器,AHB-APB总线桥接器,AHB总线上从设备ROM模型-AMBA bus of ARM company, It mainly includes the following five parts: the AHB arbiter,AHB-APB bridge, AHB_Rom_Slave, AHB_Ram_Slave
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Size: 17408 |
Author: zhch26 |
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Description: AHB to wishbone bridge verilog
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Size: 10638336 |
Author: Sheth |
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