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[Other resource] quanshuzilvboqiMatlabchengxu

Description: 全数字调制解调器设计的matlab程序 有CIC FIR等滤波器-digital modem design Matlab CIC procedures such as FIR filters
Platform: | Size: 7350 | Author: sunny_girl | Hits:

[matlab] quanshuzilvboqiMatlabchengxu

Description: 全数字调制解调器设计的matlab程序 有CIC FIR等滤波器-digital modem design Matlab CIC procedures such as FIR filters
Platform: | Size: 7168 | Author: sunny_girl | Hits:

[Other] systemtestask

Description: matlab数字滤波器，cic，hb，fir 滤波器 欢迎参考-Matlab digital filters, cic, hb, welcomed the reference filter fir
Platform: | Size: 1024 | Author: cc | Hits:

[VHDL-FPGA-Verilog] ImproveddesignofCICfilteranditsimplementationonFPG

Description: 。介绍了内插器和抽取器这2种CIC滤波器各自的结构与性能，从数学上分析了其性能及其与FIR 滤波器的关系，从频域上展示了其本质。并讨论其内部寄存器的最小位宽与溢出保护，最后介绍了抽取器与内插器分 别在FPGA上的一般实现方法，并指出了一些提高实现性能的措施与建议-. Introduction of the interpolation and Extractor This two kinds of CIC filter structure and properties of their respective, from the mathematical analysis of its performance and its relationship with the FIR filter, from the frequency domain to display its essence. And to discuss its internal register with the smallest bit overflow protection, and finally introduce the Extractor and interpolator, respectively, in the FPGA to achieve the general methods, and pointed out that a number of measures to improve performance and recommendations
Platform: | Size: 124928 | Author: 会飞的鱼 | Hits:

[VHDL-FPGA-Verilog] DecimationFilterDesignforDDCandImplementingItwithF

Description: 本文介绍了在数字下变频(DDC) 中的抽取滤波器系统设计方法和具体实现方案。采用CIC 滤波器、HB 滤波器、FIR 滤波器三级级联的方式来降低采样率。通过实际验证,证明了设计的可行性-This article describes the digital down conversion (DDC) of the decimation filter system design methods and concrete realization of the program. Using CIC filter, HB filter, FIR filter cascade three-level approach to reduce the sampling rate. Through the actual authentication, to prove the feasibility of the design
Platform: | Size: 468992 | Author: 会飞的鱼 | Hits:

[VHDL-FPGA-Verilog] yl_cic32

Description: 一个三阶梳妆滤波器（CIC）的vhdl的源码-Dressing a third-order filter (CIC) of the VHDL source code
Platform: | Size: 1024 | Author: 白杨 | Hits:

[VHDL-FPGA-Verilog] tdmddc_v61

Description: Designing Digital Down Conversion Systems with Altera CIC MegaCore and FIR Compensation Filter v6.1
Platform: | Size: 54272 | Author: | Hits:

[VHDL-FPGA-Verilog] DDC_CIC

Description: 用CIC 和 FIR Filters设计的数字下变频器，DSP Builder6.1版工程文件-Using CIC and FIR Filters Design of Digital Down Converter, DSP Builder6.1 version of project file
Platform: | Size: 50176 | Author: 达 | Hits:

[VHDL-FPGA-Verilog] FIR_TEST

Description: 应用matlab 软件设计了下变频器中的CIC、HB、FIR滤波器等核心模块，并将各模块融为一体从软件实现的角度完成了对系统的搭建和功能仿真。-About such key algorithms as CIC, HB, FIR of each module in down- conversion, discussion, abstraction and summarization are given in this paper. Using the MATLAB software, we design such core modules as CIC filter, HB filter and FIR filter of the digital down converter.
Platform: | Size: 182272 | Author: 邓建良 | Hits:

[matlab] cic

Description: 当前工程上广泛采用了一种高效滤波器，即CIC（cascaded integrator-comb filter）将其作为第一级来实现抽取、低通滤波。第二级再用一个普通的FIR滤波器就实现使后端设备工作在较低的频率下且硬件花销少、功耗也很低。-Widely used in the current project, a highly efficient filter, that is, CIC (cascaded integrator-comb filter) as the first level to achieve the extraction, low-pass filter. An ordinary second-class and then the realization of the FIR filter so that the work of the back-end equipment at a lower frequency and spending less hardware, power consumption is very low.
Platform: | Size: 63488 | Author: 王奎 | Hits:

[Software Engineering] jifenlvboqi

Description: 为了解决软件无线电通信系统中频采样之后的极大数据量在基带处理部分对DSP计算的压力,常采用多速率处理技术.多速率处理过程中需要使用积分梳状滤波器、半带滤波器和高阶FIR滤波器.在分析了积分梳状滤波器的结构和特性的基础上,阐述了多级CIC滤波器一种高效的FPGA实现方法,该方法的正确性和可行性通过Quartus Ⅱ的时序仿真分析得以验证,实际中可以推广应用.-In order to solve software-defined radio communications system after IF sampling of great amount of data to the DSP in the baseband processor part of the calculation of the pressure, often using multi-rate processing technology. Multi-rate processing need to use the integrator comb filter, half-band filters and high-order FIR filter. in the analysis of the integrator comb filter structure and characteristics, based on the multi-stage CIC filter described an efficient FPGA implementations, the correctness and feasibility of the method adopted by the timing Quartus Ⅱ simulation analysis can be verified in practice can be applied.
Platform: | Size: 180224 | Author: 王楚宏 | Hits:

[Software Engineering] xiabianpin

Description: 文中应用软件无线电思想对数字下变频器中的几个关键技术进行了研究,对下变频各个模块所涉及到的CIC、HB、FIR等关键算法进行了讨论、提炼与总结,应用matlab软件设计了下变频器中的CIC、HB、FIR滤波器等核心模块,并将各模块融为一体从软件实现的角度完成了对系统的搭建和功能仿真.仿真结果表明,系统实现了对中频信号的下变频处理且无失真现象,大大减少了软件无线电系统数宁信号处理的运算量和数据的存储量,极大地提高了系统的实时性.-The paper application software radio digital down converter in the thinking of several key technologies have been studied for the next conversion involved in each module to the CIC, HB, FIR and other key algorithms were discussed, refined and summarized the application of matlab software design downconverter in the CIC, HB, FIR filters and other core modules, and integration of various modules from the software point of complete structures and functions of the system simulation. The simulation results show that the system achieved the right under the IF signal Frequency processing and without distortion, thus greatly reducing the number of software-defined radio system, rather the amount of signal processing operations and data storage capacity, greatly improve the system in real time.
Platform: | Size: 287744 | Author: 王楚宏 | Hits:

[DSP program] dspddc_R12p1

Description: 基于DSPbuilder搭建的DDC，里面包括CIC滤波器，FIR低通滤波器，HB半带滤波器，NCO等，实现了GC5016芯片的功能-DSPbuilder erected based on DDC, which include the CIC filter, FIR low-pass filter, HB half-band filter, NCO, etc. to achieve the function of the GC5016 chip
Platform: | Size: 17408 | Author: 郑程 | Hits:

[Books] fir

Description: 本文以软件无线电为指导，提出基于CORDIC算法利用FPGA平台数字下变频器设计方案。首先分析下变频器的结构；然后采用模块化设计思想，将数字下变 频的功能模块包括数字控制振荡器、CIC抽取滤波、HBF抽取滤波器、FIR低通滤波器进行分析和FPGA的设计；最后在 MATLAB/DSPBuilder下硬件仿真模块进行仿真并给出仿真结果。-In this paper, software-defined radio as the guidance, based on the CORDIC algorithm uses the FPGA platform, digital down-converter design. First analyzes the structure of down-converter and then use a modular design concept, the digital down-conversion function modules including digital controlled oscillator, CIC decimation filtering, HBF decimation filter, FIR low-pass filter for analysis and FPGA design the final In the MATLAB/DSPBuilder under the hardware emulation module simulation and simulation results.
Platform: | Size: 201728 | Author: jiang | Hits:

[VHDL-FPGA-Verilog] cic_intp_64_four

Description: 4阶CIC内插滤波器，内插系数64，Verilog版本，数字下变频-4-order interpolating CIC filter interpolation factor of 64, Verilog version of the digital down-conversion
Platform: | Size: 1024 | Author: 王刚 | Hits:

[VHDL-FPGA-Verilog] hdlsrc_new

Description: CIC滤波器实现，级联FIR，节省资源-CIC filter
Platform: | Size: 5120 | Author: 张贼妥 | Hits:

[matlab] 49636992ciccomp

Description: 级联积分－梳状(Cascaded Integrator–Comb，CIC)滤波器，是种高 效滤波器。它是一种线形相位FIR滤波器，由工作在高抽样率的级联理 想积分器和低抽样率的级联微分器组成,根据抗混叠和抗镜像的指标 确定所需的级联数目。 -Cascaded integrator- comb (Cascaded Integrator-Comb, CIC) filter, is the kind of high efficiency filter. It is a linear phase FIR filter, high sampling rate by the work in the cascade of an ideal integrator and a low sampling rate of the cascade differentiator formed, according to anti-aliasing and anti-mirror of the indicators to determine the number of required cascade.
Platform: | Size: 2048 | Author: 刘哲 | Hits:

[matlab] FIR

Description: 详细介绍了窄带滤波器的设计，如半带，CIC等原理，原理很详细-Details of the narrow-band filter design, such as half-band, CIC and other principles, the principle in detail
Platform: | Size: 656384 | Author: eric | Hits:

[VHDL-FPGA-Verilog] CIC-NCO-HB-FIR

Description: 数字下变频的论文，包含各个模块的设计，其中有CIC,HB,FIR,NCO等模块和源代码。-Digital down conversion papers, including the design of each module, including CIC, HB, FIR, NCO, modules and source code.
Platform: | Size: 4076544 | Author: 欧熊平 | Hits:

[VHDL-FPGA-Verilog] fir

Description: 积分梳状滤波器(CIC)设计；,有详细的步骤-Integrator comb filter ( CIC ) design
Platform: | Size: 1024 | Author: longcheng | Hits:
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