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Search - CORDIC in verilog

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[Other resource] magnitude

Description: Verilog HDL: Magnitude For a vector (a,b), the magnitude representation is the following: A common approach to implementing these arithmetic functions is to use the Coordinate Rotation Digital Computer (CORDIC) algorithm. The CORDIC algorithm calculates the trigonometric functions of sine, cosine, magnitude, and phase using an iterative process. It is made up of a series of micro-rotations of the vector by a set of predetermined constants, which are powers of two. Using binary arithmetic, this algorithm essentially replaces multipliers with shift and add operations. In a Stratix™ device, it is possible to calculate some of these arithmetic functions directly, without having to implement the CORDIC algorithm. -Verilog HDL : For a vector magnitude (a, b), the magnitude representation is the following : A common approach to implementing thes e arithmetic functions is to use the Coordinate Rotation Digital Computer (CORDIC) algorithm. The CORDIC algorithm calculates the trigonome tric functions of sine, cosine, magn itude, and phase using an iterative process. It i 's made up of a series of micro-rotations of the v ector by a set of predetermined cons tants, which are powers of two. Using binary ar praxiology metic, this algorithm essentially replaces m ultipliers with shift and add operations. In a Stratix
Platform: | Size: 12917 | Author: 郝晋 | Hits:

[Algorithm] CORDIC_FLOAT

Description: 这是一个数值计算算法在FPGA中实现的东东。包括CORDIC算法的详细资料还有float型数的详细论述，可供参考。-This is a numerical algorithms in FPGA achieve saucepan. CORDIC algorithm include detailed information is the number of float-type discussed in detail for reference.
Platform: | Size: 2979840 | Author: 克林顿 | Hits:

[Other] CORDIC-algorithms

Description: cordic算法的详细介绍，方便大家使用和研究-cordic detailed description of the algorithm, to facilitate the use and research
Platform: | Size: 122880 | Author: mh | Hits:

[VHDL-FPGA-Verilog] magnitude

Description: Verilog HDL: Magnitude For a vector (a,b), the magnitude representation is the following: A common approach to implementing these arithmetic functions is to use the Coordinate Rotation Digital Computer (CORDIC) algorithm. The CORDIC algorithm calculates the trigonometric functions of sine, cosine, magnitude, and phase using an iterative process. It is made up of a series of micro-rotations of the vector by a set of predetermined constants, which are powers of two. Using binary arithmetic, this algorithm essentially replaces multipliers with shift and add operations. In a Stratix™ device, it is possible to calculate some of these arithmetic functions directly, without having to implement the CORDIC algorithm. -Verilog HDL : For a vector magnitude (a, b), the magnitude representation is the following : A common approach to implementing thes e arithmetic functions is to use the Coordinate Rotation Digital Computer (CORDIC) algorithm. The CORDIC algorithm calculates the trigonome tric functions of sine, cosine, magn itude, and phase using an iterative process. It i 's made up of a series of micro-rotations of the v ector by a set of predetermined cons tants, which are powers of two. Using binary ar praxiology metic, this algorithm essentially replaces m ultipliers with shift and add operations. In a Stratix
Platform: | Size: 12288 | Author: 郝晋 | Hits:

[Algorithm] CORDIC

Description: cordic算法，包含所有的CORDIC的算法，与发表过的论文，与实现方案-CORDIC algorithm, contains all of the CORDIC algorithm, and published papers, and implementation of programs
Platform: | Size: 8102912 | Author: elisen | Hits:

[VHDL-FPGA-Verilog] c20_cordic_computer

Description: 精通verilog HDL语言编程源码之6--CORDIC数字计算机的设计-Proficient in language programming verilog HDL source of 6- CORDIC digital computer design
Platform: | Size: 1024 | Author: 李平 | Hits:

[VHDL-FPGA-Verilog] 4bit_buma_adder

Description: Verilog作业 ：自己写的源码输入，补码输出的，由状态机控制的四位加法器，为保证时序，加法器模块为超前近位加法器，包含测试台，通过 Modelsim 、Synplify仿真。-Verilog operation: the source code to write their own input, complementary code output by the state machine to control the four adder, in order to ensure timing, adder module ahead of the last bit adder, including test bed, through the Modelsim, Synplify simulation.
Platform: | Size: 2048 | Author: wizard | Hits:

[Applications] tb_cordic

Description: cordic algorithm in verilog
Platform: | Size: 3072 | Author: adeel | Hits:

[VHDL-FPGA-Verilog] division_cordic

Description: verilog code for division based on cordic algorithm
Platform: | Size: 1024 | Author: meysam | Hits:

[VHDL-FPGA-Verilog] cordic

Description: vhdl语言编写的cordic算法，实现了cordic的流水线运算。-cordic language vhdl algorithm cordic the pipeline operator.
Platform: | Size: 1024 | Author: lmy | Hits:

[VHDL-FPGA-Verilog] cordicDDS

Description: Cordic算法实现DDS的Verilog 源码,14位精度，非常实用的。-DDS algorithm Cordic the Verilog source code, 14-bit accuracy, very practical.
Platform: | Size: 7168 | Author: 王王 | Hits:

[Books] fir

Description: 本文以软件无线电为指导，提出基于CORDIC算法利用FPGA平台数字下变频器设计方案。首先分析下变频器的结构；然后采用模块化设计思想，将数字下变 频的功能模块包括数字控制振荡器、CIC抽取滤波、HBF抽取滤波器、FIR低通滤波器进行分析和FPGA的设计；最后在 MATLAB/DSPBuilder下硬件仿真模块进行仿真并给出仿真结果。-In this paper, software-defined radio as the guidance, based on the CORDIC algorithm uses the FPGA platform, digital down-converter design. First analyzes the structure of down-converter and then use a modular design concept, the digital down-conversion function modules including digital controlled oscillator, CIC decimation filtering, HBF decimation filter, FIR low-pass filter for analysis and FPGA design the final In the MATLAB/DSPBuilder under the hardware emulation module simulation and simulation results.
Platform: | Size: 201728 | Author: jiang | Hits:

[VHDL-FPGA-Verilog] cordic

Description: 在QUARTUS环境下，通过Verilog实现cordic，产生sin，cos-In QUARTUS environment, through the Verilog implementation cordic, generate sin, cos
Platform: | Size: 1709056 | Author: 洪依 | Hits:

[VHDL-FPGA-Verilog] 12

Description: cordic algorithm using verilog code
Platform: | Size: 1024 | Author: rams | Hits:

[VHDL-FPGA-Verilog] cordic

Description: Cordic algorithm implementation in verilog for use in DDS
Platform: | Size: 5120 | Author: zcos123 | Hits:

[VHDL-FPGA-Verilog] Cordic_Verilog

Description: 基于FPGA平台的，坐标旋转数字计算方法Cordic的Verilog描述。可用于计算sin、cos等三角函数。-Cordic in verilog hdl
Platform: | Size: 3072 | Author: 孙佳宇 | Hits:

[Other systems] cordic

Description: it is a code to implement cordic algorithm in verilog. it calculates sin and cosine of an input angle.
Platform: | Size: 2048 | Author: reena | Hits:

[Other systems] cordic_iterate

Description: it is a code for cordic algorithm in verilog. it computes sine and cosine of an angle which is the input. it is iterative structure of cordic.
Platform: | Size: 2048 | Author: reena | Hits:

[VHDL-FPGA-Verilog] serial-cordic-verilog

Description: implementation of cordic algorithm for many aplication like cos, sinus, polar to rectangular conversion and rectangular to polar conversion. It s written in verilog language and testbench is included
Platform: | Size: 3072 | Author: appolo | Hits:

[Other] cordic-Vpy

Description: cordic processor in verilog code is been programmed for fpga. Cordic has rotational matrix with input vectors which can be rotated in phasor plane
Platform: | Size: 3072 | Author: Akshay | Hits:
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