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[Other resource] Verilog_Development_Board_Sources

Description: 朋友，我是Jawen.看到先前上载的一套CPLD开发板的VHDL源码挺受欢迎的，现在就将她的Verilog源码也一并贡献给大家：8位优先编码器,乘法器,多路选择器,二进制转BCD码,加法器,减法器,简单状态机,四位比较器,7段数码管,i2c总线,lcd液晶显示,拨码开关,串口,蜂鸣器,矩阵键盘,跑马灯,交通灯,数字时钟-friends, I Jawen. previously seen on the set of CPLD Development Board VHDL source code quite welcome, Now she will also be Verilog source contribution to everyone : eight priority encoder, multipliers, Multi-channel selector, binary to BCD, adder, subtraction device, the simple state machine, four comparators, 7 of the digital control, i2c bus, lcd LCD allocated code switches, serial port, the buzzer sounded, matrix keyboards, Bomadeng. Traffic lights, digital clock
Platform: | Size: 3152400 | Author: Jawen | Hits:

[Other resource] LCD_AV

Description: 这是用Verilog语言编写AV型LCD屏的驱动程序CPLD上运行并调试成功的。可用作数字到模拟LCD转换-Verilog language AV-screen LCD driver CPLD debugging and running successful. Can be used to simulate LCD digital conversion
Platform: | Size: 913 | Author: kensom | Hits:

[VHDL-FPGA-Verilog] lcdexample

Description: cpld实现与液晶屏并口通信，VHDL 语言编程。对VHDL初学者应该有帮助的。-cpld achieve parallel with the LCD screen communications, VHDL programming. Right VHDL beginners should help.
Platform: | Size: 1024 | Author: 黄小光 | Hits:

[VHDL-FPGA-Verilog] Verilog_Development_Board_Sources

Description: 朋友，我是Jawen.看到先前上载的一套CPLD开发板的VHDL源码挺受欢迎的，现在就将她的Verilog源码也一并贡献给大家：8位优先编码器,乘法器,多路选择器,二进制转BCD码,加法器,减法器,简单状态机,四位比较器,7段数码管,i2c总线,lcd液晶显示,拨码开关,串口,蜂鸣器,矩阵键盘,跑马灯,交通灯,数字时钟-friends, I Jawen. previously seen on the set of CPLD Development Board VHDL source code quite welcome, Now she will also be Verilog source contribution to everyone : eight priority encoder, multipliers, Multi-channel selector, binary to BCD, adder, subtraction device, the simple state machine, four comparators, 7 of the digital control, i2c bus, lcd LCD allocated code switches, serial port, the buzzer sounded, matrix keyboards, Bomadeng. Traffic lights, digital clock
Platform: | Size: 3151872 | Author: Jawen | Hits:

[SCM] LCD_AV

Description: 这是用Verilog语言编写AV型LCD屏的驱动程序CPLD上运行并调试成功的。可用作数字到模拟LCD转换-Verilog language AV-screen LCD driver CPLD debugging and running successful. Can be used to simulate LCD digital conversion
Platform: | Size: 1024 | Author: | Hits:

[Embeded-SCM Develop] VGA

Description: cpld实现vga驱动的程序，用verilog语言实现。-Via verilog language，it can complete the drive of vga module.
Platform: | Size: 233472 | Author: 朱特 | Hits:

[VHDL-FPGA-Verilog] LCD

Description: LCD Interface_Xilinx.CPLD源码参考设计-LCD Interface Xilinx CPLD
Platform: | Size: 1978368 | Author: huangxing | Hits:

[VHDL-FPGA-Verilog] Libra_ps2key_lcd

Description: 用Verilog语言实现的PS2小键盘输入和1602 LCD显示的功能。无需修改，已经调试通过了。直接可以当成一个模块用于FPGA/CPLD系统开发过程。 这个代码是我在Libra环境下开发Actel FPGA时写的。-Verilog language using the PS2 keyboard and a small 1602 LCD display features. No changes have been adopted debugging. Directly as a module for the FPGA/CPLD system development process. This code is my development environment in Libra when written in Actel FPGA.
Platform: | Size: 6144 | Author: 赵二虎 | Hits:

[VHDL-FPGA-Verilog] VerilogHDL-and-CPLD-programming-technology

Description: 从零开始学CPLD和VerilogHDL编程技术，包括实验板原理图和实验源代码。-VerilogHDL learn from scratch and CPLD programming technologies, including board schematics and test source code.
Platform: | Size: 3163136 | Author: 宋大力 | Hits:

[VHDL-FPGA-Verilog] Lcd_Driver

Description: TFT LCD驱动,CPLD,XL95144-verilog-TFT LCD DRIVER-verilog
Platform: | Size: 1952768 | Author: WangJQ | Hits:

[VHDL-FPGA-Verilog] 11111

Description: 1、用FPGA/CPLD实现HS162字符液晶显示。 2、分析相应的功能要求，分析CPLD与字符液晶HS162的接口典型电路。 3、利用状态机的设计方法，通过指令编程实现对HS162-4液晶模块的读/写操作，以及屏幕和光标的操作。 4、编写模块的Verilog HDL语言的设计程序。 5、在Quartus II软件或其他EDA软件上完成设计和仿真。 -This design of a CPLD-based controls HS162 to achieve character LCD display. The use of state machine design, programming by instruction of HS162 LCD module s read/write operations, as well as screen and cursor operations. Verilog HDL module written language design process. I used Quartus II software to complete the design and simulation. Primarily through software programming of CPLD, and provide power, clock, download the program, and reset other peripheral circuits necessary to achieve control of the character LCD to display the default character.
Platform: | Size: 1046528 | Author: kevin mk li | Hits:

[Windows Develop] fVerrilog_Devr

Description: 朋友，我是Jawen.看到先前上载的一套CPLD开发板的VHDL源码挺受欢迎的，现在就将她的Verilog源码也一并贡献给大家：8位优先编码器，乘法器，多路选择器，二进制转BBCD码，加法器，减法器，简简单易懂状态机，四位比较器，7段数码管，i2c总线，lcd液晶LCD显示出来，拨码开关，串口，蜂鸣器，矩阵键盘，跑马灯，交通灯，数字时钟 可直接使用。 -Friends, I Jawen. See previous upload a CPLD Development Board VHDL source code quite popular, she will Verilog source together with contribution to everyone: eight priority encoder, multipliers, multiplexers binary switch the BBCD code, adder, subtracter, simple straightforward state machine, four comparators, 7-segment LED, i2c bus, lcd LCD LCD display, DIP switch, serial port, buzzer, matrix keyboard, Marquee, traffic lights, digital clock can be used directly.
Platform: | Size: 3170304 | Author: qtzx | Hits:

[Other] FPGA-a-CPLD-newest-Technology-guide

Description: FPGA／CPLD技术是近年来计算机与电子技术领域的又一场革命。本书以Xilinx与Altera公司的FPGA／CPLD为主，详细介绍了FPGA／CPLD从芯片到MAX+plusⅡ、Quartus与ISE开发环境和Verilog／VHDL语言，并以交通灯逻辑控制、电子钟与点阵LED显示、LCD液晶显示及计算机ISA接口和PCI接口的设计等为例，由浅入深地详述了如何应用FPGA／CPLD进行电子设计。书中的大多数电路图和源程序已经过实例验证，读者可以直接应用于自己的设计。本书的特点是强调实用性和先进性，力求通俗易懂。 本书适用于计算机、电子、控制及信息等相关专业的在校大学生，对广大工程技术人员也具有实用价值。-FPGA/CPLD technology in recent years the field of computer technology and electronic another revolution. Book Xilinx and Altera' s FPGA/CPLD based, detailing the FPGA/CPLD from the chip to MAX+plus Ⅱ, Quartus and ISE development environment and Verilog/VHDL language and logic control traffic lights, electronic bell with dot matrix LED display , LCD liquid crystal display and computer ISA interface and PCI interface design, for example, progressive approach to detail how the application of FPGA/CPLD for electronic designs. Circuit and the source of most of the book have been instances of verification, the reader can be directly applied to their own design. Characteristic of this book is to emphasize the practical and advanced, best straightaway. This book applies to computers, electronics, control and information and other related professional college students, the majority of engineering and technical personnel also has practical value.
Platform: | Size: 5460992 | Author: 朱杞柠 | Hits:

[Embeded-SCM Develop] lcdname2(santez)

Description: this program is used to dislay a text on lcd .the language is verilog and it can be usedto program FPGA OR CPLD
Platform: | Size: 110592 | Author: mary | Hits:

[VHDL-FPGA-Verilog] digitalclock

Description: digital alarm clock on lcd- written in verilog to program fpga or cpld
Platform: | Size: 232448 | Author: mary | Hits:

[VHDL-FPGA-Verilog] LCD1602

Description: Verilog 语言 CPLD 控制液晶自定义输出程序，可仿真，可转换电路原理图。-Verilog language CPLD control LCD custom output procedures, can be simulated, can be converted to circuit schematics.
Platform: | Size: 368640 | Author: 王志 | Hits:

[VHDL-FPGA-Verilog] tinycpufiles

Description: TinyCPU源码,使用Verilog编写的资源占用极少的CPU。Quartus工程，可跑在Altera MAXII CPLD上,也很方便移植到其他FPGA上。CPU使用200个逻辑单元，外设(SPI,LCD等)使用180个逻辑单元。 内含汇编编译器源码(VC2008)，可编译CPU对应的汇编文件。-The sourcecode of TinyCPU, which only consumed very few logical cells, written by Verilog. It is a Quartus project, and it can run well on Altera MAXII CPLD, and it is conveniently change to other FPGAs. The CPU used 200 Logical Cells, and the device (peripherals such as SPI, LCD) used 180 Logical Cells. It also included a assembler source code (by VC2008), which can compile the asm file for the CPU.
Platform: | Size: 60416 | Author: 肖海云 | Hits:

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