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[Other] crc_pkg

Description: VHDL语言实现的CRC校验，函数形式，包括CRC4,CRC8,CRC16和CRC32
Platform: | Size: 2040 | Author: 李浩 | Hits:

[VHDL-FPGA-Verilog] CRC-Verilog

Description: 此是进行循环冗余效验的Verilog编码，适合多种标准，如CRC16-this Cyclic Redundancy is well-tested Verilog code for a variety of criteria, such as CYXLIC REDUNDANCY
Platform: | Size: 3072 | Author: 藏瑞 | Hits:

[Other] crc_pkg

Description: VHDL语言实现的CRC校验，函数形式，包括CRC4,CRC8,CRC16和CRC32-VHDL language to achieve the CRC checksum, function forms, including CRC4, CRC8, CRC16 and CRC32
Platform: | Size: 2048 | Author: 李浩 | Hits:

[Crack Hack] crc

Description: 此源代码实现了CRC5和CRC16的校验以及校验码的产生，可以直接用于RFID标签数字电路。-This source code CRC5 and realize the CRC16 checksum and the emergence of parity-check codes, RFID tags can be directly used for digital circuits.
Platform: | Size: 2048 | Author: 朱秋玲 | Hits:

[Other Embeded program] crc16

Description: 16位的CRC校验函数包。符合ccitt标准，查表法校验，速度快。节省CPU时间。值得一看！-16 The CRC checksum function package. Consistent with the CCITT standards, look-up table method validation, fast. Save CPU time. Worth a visit!
Platform: | Size: 1024 | Author: cumt | Hits:

[Crack Hack] crc16

Description: 16bit CRC for 8bits data
Platform: | Size: 1024 | Author: 苗淼 | Hits:

[VHDL-FPGA-Verilog] crc16

Description: crc16 module for SDIO DAT line calculation
Platform: | Size: 1024 | Author: kantengri | Hits:

[VHDL-FPGA-Verilog] CRC_16

Description: crc16的串行和并行写法，而且有详细的测试文件-Serial and parallel crc16 written, and detailed test documents
Platform: | Size: 20480 | Author: Jammy | Hits:

[Software Engineering] usb_latest[1].tar

Description: sub opercore USB CRC5 and CRC16 Modules //// //// //// //// //// //// Author: Rudolf Usselmann //// //// rudi@asics.ws //// //// //// //// //// //// Downloaded from: http://www.opencores.org/cores/usb/-sub opercore USB CRC5 and CRC16 Modules//////////////////////// Author: Rudolf Usselmann//////// rudi@asics.ws//////////////////////// Downloaded from: http://www.opencores.org/cores/usb/
Platform: | Size: 196608 | Author: hajc | Hits:

[VHDL-FPGA-Verilog] crc16_8

Description: crc16,数据位宽为8，verilog编码-crc16 ,datawidth is 8,coding by verilog
Platform: | Size: 1024 | Author: chenk | Hits:

[Other] crc_peripheral

Description: -- crc.vhd -- Used for calculation of CRC16-CCITT -- Intended use is as custom peripheral for Nios processor -- When address is logic 0 => -- Internal CRC register is initialised with write_data value -- When address is logic 1 => -- CRC calulation is updated based on input word on write_data -- CRC result is obtained by reading any address
Platform: | Size: 1024 | Author: Jan Petak | Hits:

[VHDL-FPGA-Verilog] CRC16_VHDL

Description: CRC16 VHDL component implements sequential algorithm for incoming data CRC16 calculation
Platform: | Size: 3072 | Author: Dmitry | Hits:

[VHDL-FPGA-Verilog] CRC16-0_5_12_16

Description: 包含16位CRC的并行实现和串行实现，并有测试程序。-Includes 16-bit CRC of the parallel and serial implementation to achieve, and test procedures.
Platform: | Size: 3072 | Author: 程显雯 | Hits:

[VHDL-FPGA-Verilog] crc16

Description: 16位的CRC校验　使用VHDL实现　有几个模块　主模块　接收模块　测试模块-16-bit CRC checksum VHDL implementation
Platform: | Size: 301056 | Author: 李晓倩 | Hits:

[VHDL-FPGA-Verilog] crc16

Description: 一个实现CRC16的VHDL代码，以及说明CRC计算的原理和方法。(a VHDL code for CRC16.)
Platform: | Size: 7168 | Author: camelcc | Hits:

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