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[WEB Code] da

Description: for DA 16 FIR tell.rar
Platform: | Size: 575754 | Author: tay | Hits:

[SourceCode] 串行DA算法实现FIR滤波器

Description: 串行DA算法实现16阶FIR滤波器
Platform: | Size: 576747 | Author: silovew | Hits:

[DSP program] TMS320C54x DSP 的cpu和外围设备

Description: 针对在FPGA中实现FIR滤波器的关键--乘法运算的高效实现进行了研究，给了了将乘法化为查表的DA算法，并采用这一算法设计了FIR滤波器。通过FPGA仿零点验证，证明了这一方法是可行和高效的，其实现的滤波器的性能优于用DSP和传统方法实现FIR滤波器。最后介绍整数的CSD表示和还处于研究阶段的根据FPGA实现的要求改进的最优表示。-view of the FPGA FIR filters achieve the key-- the multiplication Efficient Implementation of research, to the multiplication of the DA into Lookup algorithm, and using the algorithm design of the FIR filter. FPGA through imitation 0.1 certification proves that the method is feasible and efficient, achieve superior filter performance DSP and traditional FIR filter method. Finally, integral and said the CSD is still in the research stage on the basis of FPGA requirements of the optimal said.
Platform: | Size: 1424384 | Author: 呈一 | Hits:

[VHDL-FPGA-Verilog] 6tapFIR

Description: 6阶FIR+verliog+分布式算法（DA）-6 bands FIR+ Verliog+ Distributed Arithmetic (DA)
Platform: | Size: 2048 | Author: zs | Hits:

[VHDL-FPGA-Verilog] 16_FIR

Description: 16阶FIR滤波器--本设计用VERILOG HDL语言串行DA算法实现16阶有限频率响应滤波器！-16-order FIR filter- this design language VERILOG HDL serial DA algorithm limited frequency response of 16-order filter!
Platform: | Size: 799744 | Author: yuming | Hits:

[VHDL-FPGA-Verilog] DA_fir

Description: 基于分布式算法的FIR滤波器设计及FPGA实现-Distributed algorithm based on FIR filter design and FPGA realization of
Platform: | Size: 4721664 | Author: 玉玲 | Hits:

[VHDL-FPGA-Verilog] verilog.DA.FIR..

Description: 用verilog写的16阶串行DA算法FIR滤波器-Verilog written by 16-order FIR filter serial DA algorithm
Platform: | Size: 576512 | Author: 代鑫 | Hits:

[Embeded-SCM Develop] FIR

Description: 实时语音FIR滤波设计 通过TLC320AD50采集音频信号，然后对其进行高通（FIR）滤波，将滤波后的数据输出到TLC320AD50，经TLC320AD50的DA转换后输出。-FIR filter design real-time voice capture through TLC320AD50 audio signal, and then its high-pass (FIR) filtering, the filtered data output to the TLC320AD50, the DA converted by the TLC320AD50 output.
Platform: | Size: 405504 | Author: milijly | Hits:

[Other] fft_fir_filter_latest.tar

Description: 数字滤波器的源代码，已经仿真，FIR ，分布式算法，FPGA-digital filter multerRTL,FIR,DA,FPGA,shixian wancheng
Platform: | Size: 184320 | Author: zhaoxia | Hits:

[ARM-PowerPC-ColdFire-MIPS] msp430

Description: msp430 实验代码 1,MSP430开发基础 2，键盘设计 3，数码管显示电路设计 4，液晶模块接口 5，MSP430 CRC 6，中文输入法 7，数据压缩算法 8，FIR滤波 9，FFT算法 10，波特率自动识别 11,串行存储 12；NAND flash 接口 13；A/ D，TLV2541 14；DA DAC8830 15；ADS1241 16；温度 TMP100 17；定时器 DAC 18；数据采集 19；交流电压测量 20；车速测量 21；DS1820 22；DS1302 23；基于BQ26500温度检测系统 24；红外传输系统 25；pc通信 26；无线MODEM 27；楼宇对讲系统 28；DSP HPI接口 29；无线传输模块 30；步进电机控制 31；can通信系统-msp430 test code 1, MSP430 Development Foundation 2, keyboard 3, the digital display circuit 4, the LCD module interface 5, MSP430 CRC 6, 7, Chinese input methods, data compression algorithm 8, FIR filter 9, FFT algorithm for 10, Porter automatic identification rate of 11, serial memory 12 NAND flash interface, 13 A/D, TLV2541 14 DA DAC8830 15 ADS1241 16 temperature TMP100 17 timer DAC 18 data collection 19 AC voltage measurement 20 speed measurement 21 DS1820 22 DS1302 23 temperature detection system based on BQ26500 24 infrared transmission system 25 pc communication 26 wireless MODEM 27 building intercom system 28 DSP HPI interface, 29 wireless transmission module 30 stepper motor control 31 can Communication Systems
Platform: | Size: 247808 | Author: teamo38 | Hits:

[VHDL-FPGA-Verilog] da

Description: FIR滤波器利用串行DA算法实现16阶的，直接可用 ，用VHDL编程-Serial DA FIR filter algorithm using 16 bands, directly available, VHDL programming
Platform: | Size: 215040 | Author: 赵擎天 | Hits:

[VHDL-FPGA-Verilog] FIR

Description: 本程序实现了FIR滤波器，使用了全并行的分布式DA算法，附有仿真波形。-FIR filter with DA
Platform: | Size: 399360 | Author: dingweihua | Hits:

[VHDL-FPGA-Verilog] DA-FIR

Description: 采用DA算法实现FIR滤波器的设计实验原理建模仿真-DA algorithm using FIR filter design principles of modeling and simulation experiments
Platform: | Size: 217088 | Author: 郭静 | Hits:

[matlab] FIR

Description: 在matlab环境下编写的完整程序。其中包含DA AD 转换-Written in the matlab environment, the full program. Which contains the DA AD conversion
Platform: | Size: 1024 | Author: Angela Lee | Hits:

[VHDL-FPGA-Verilog] da_fir

Description: DA实现FIR滤波器，8阶对称系数。滤波器输入位宽为12bit。-DA FIR filter implementation, 8 symmetric coefficients. Filter input bit width is 12bit.
Platform: | Size: 1024 | Author: 张雯 | Hits:

[VHDL-FPGA-Verilog] DA-FIR-FPGA

Description: 详细介绍了分布式算法FIR的设计，对于用FPGA实现FIR的设计具有指导意义。来自华中科大。-Detailed design of a distributed algorithm FIR, FPGA implementation for the FIR design with a guide. From HUST.
Platform: | Size: 290816 | Author: ye | Hits:

[VHDL-FPGA-Verilog] DA_FIR_VERILOG

Description: 基于DA算法的FIR滤波器的verilog实现-DA-based FIR filter algorithm to achieve the verilog
Platform: | Size: 1024 | Author: wangyu | Hits:

[VHDL-FPGA-Verilog] FIRde-verilog-shixian

Description: 有符号DA算法的FIR滤波器的Verilog实现-A symbol of the algorithm of DA FIR filters Verilog realized
Platform: | Size: 4096 | Author: 紫微 | Hits:

[Other] fir

Description: fir滤波器的几种结构virelog代码（串行，并行，DA结构以及多相抽取结构），程序包为ise工程-fir filter several the structure virelog code (serial, parallel, DA structure and multiphase extraction structure), the program package for the ise project
Platform: | Size: 1005568 | Author: 黄远望 | Hits:

[VHDL-FPGA-Verilog] verilog-fir

Description: 基于verilog的三种不同方式的fir滤波器 fir1:直接型 fir2：串行DA fir3：并行DA-Fir filter for the verilog three different ways fir1: direct type fir2 of: serial of DA fir3: parallel DA
Platform: | Size: 2048 | Author: | Hits:
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