Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Search - DAC BY VHDL

Search list

[VHDL-FPGA-Verilog] vhdl程序例子

Description: vhdl程序源代码，包括Combinational Logic Counters Shift Registers Memory State Machines Registers Systems ADC and DAC Arithmetic等-VHDL source code, including Combinational Logic Counters Shift Registers State Machines Registers Memory Systems ADC and DAC Arithmetic etc.
Platform: | Size: 168960 | Author: 王力 | Hits:

[VHDL-FPGA-Verilog] DAC0832

Description: 由VHDL 语言实现的DA0832器利用的是QUARTUES环境已经得到验证-By the VHDL language uses the DA0832 is QUARTUES environment has been tested
Platform: | Size: 173056 | Author: df | Hits:

[DSP program] ADC_DAC

Description: This example streams input from a ADC source to a DAC. An analog signal is acquired block-by-block into SDRAM from the ADC (an AD9244 in this example). The frames are then output with a one-frame delay to the DAC (an AD9744 in this example). In this example, no processing is done on the frames. They are passed unaltered.
Platform: | Size: 23552 | Author: gaofeng | Hits:

[VHDL-FPGA-Verilog] dac0832_VHDL

Description: 用Verilog HDL编写的0832源程序，实现对0832实现D/A转换。也可方便地转换为vhdl源程序。-Prepared by using Verilog HDL source code 0832, 0832 to achieve the realization of D/A conversion. Also can be easily converted to VHDL source code.
Platform: | Size: 58368 | Author: 楼夏岚 | Hits:

[VHDL-FPGA-Verilog] VHDL

Description: DEMO2 数码管扫描显示电路/DEMO4 计数时钟 DEMO5 键盘扫描设计/DEMO6 波形发生器/DEMO7 用DAC实现电压信号检测/DEMO8 ADC电压测量/DEMO9 液晶驱动电路设计-DEMO2 digital tube display circuit scan/DEMO4 count clock scan design DEMO5 keyboard/DEMO6 Waveform Generator/DEMO7 implementation by DAC voltage signal detection/DEMO8 ADC voltage measurement/DEMO9 LCD driver circuit design
Platform: | Size: 736256 | Author: wang | Hits:

[VHDL-FPGA-Verilog] sine_wave_generator_using_FPGA_implementation

Description: 该资料介绍了用FPGA实现正弦波发生器，原理是利用内置rom表，通过查询的方式实现输出，然后经过外部DAC输出，频率达到1MHz-The information on the sine wave generator using FPGA implementation, the principle is the use of built-in rom form, by querying the means to achieve the output, and then an external DAC output frequency of 1MHz
Platform: | Size: 2190336 | Author: 陈振林 | Hits:

[VHDL-FPGA-Verilog] sjbo

Description: 利用DAC，通过分频等程序，利用VHDL语言编写的三角波，-By DAC, frequency and other procedures through the use of VHDL language in the triangle wave,
Platform: | Size: 165888 | Author: 董会云 | Hits:

[VHDL-FPGA-Verilog] vga

Description: This VHDL sample demonstrates how to generate a VGA signal to make it possible to connect an FPGA to a monitor. Written for Mimas v2, but probably easily adapted to any other board with a VGA connector on it (that can also be done by manually connecting a VGA port to a R-2R DAC and connecting that to GPIO: google for more information).
Platform: | Size: 1024 | Author: Ruben | Hits:

CodeBus www.codebus.net