Search - DDS FM

[Other resource] FM-ok

Description: VHDL编写的驱动DDS，ad9850的程序，用于产生FM波
Platform: | Size: 318268 | Author: bobo | Hits:

[VHDL-FPGA-Verilog] DDS_信号源

Description: dds 精确步进100HZ.拨码开关选择FSK,FM等功能.最高频率25M,DA芯片9760.VHDL编写
Platform: | Size: 5324098 | Author: wuyunzheng | Hits:

[SCM] SINE_SIGNAL_generator_base_on_Single_Chip_Micyoco.

Description: 以SPCE061A单片机（ Single Chip Micyoco）为核心，通过DDS合成技术设计制作了一个步进值能任意调节的多功能信号源。该信号源在1KHz～10MHz范围能输出稳定可调的正弦波，并具有AM、FM、ASK和PSK等调制功能。信号输出部分采用低损耗电流反馈型宽带运放作电压放大，很好地解决了带宽和带负载能力的要求。系统带中文显示和键盘控制功能，操作简便，实现效果良好。内含原程序，正弦信号发生器的pCB原理图，以及一些相关论文。-to SPCE061A (Single Chip Micyoco) at the core, DDS technology through the design of an arbitrary value of Step-conditioned multi-purpose signal source. The signal source in a KHz- 10MHz range stability can be adjustable output sine wave, with AM, FM, ASK and other PSK modulation functions. Part of the output signals using low loss current-feedback operational amplifier for wideband voltage amplification and very good solution with the bandwidth and load capacity requirements. Chinese system with display and keyboard control functions, simple operation, achieving good results. Intron original program, sinusoidal signal generator pCB diagram, and a number of related papers.
Platform: | Size: 520192 | Author: 陈朋 | Hits:

[SCM] DDS

Description: 基于ｆｐｇａ，采用ｑｕａｒｔｕｓ２的ＤＤＳ信号发生器，采用高速ＤＡＣ９０８为数模芯片，并可通过５１单片机送入调制信号进行ＦＭ调制-Based on the fpga, the use of the DDS signal generator quartus2 using DAC908 number of high-speed chip module, and passed into 51 single-chip FM modulation signal modulation
Platform: | Size: 2745344 | Author: 张新 | Hits:

[SCM] sin

Description: 以SPCE061A单片机为核心，通过DDS合成技术设计制作了一个步进值能任意调节的多功能信号源。该信号源在1KHz～10MHz范围能输出稳定可调的正弦波，并具有AM、FM、ASK和PSK等调制功能。信号输出部分采用低损耗电流反馈型宽带运放作电压放大，很好地解决了带宽和带负载能力的要求。系统带中文显示和键盘控制功能，操作简便，实现效果良好。-SPCE061A can preview and so on 片 Lennon为， Center Services Toru DDS magnetic rude summarized chirpy术instance, a few leftover制brazing stamp festival值vehicles Qin Kui 任 comment slander people cavity features信ulcers ulcers信Tai Tai 。 clams Now 1KHz `10MHz Kui Yu围HUAI embankment稳corner cavity strip Qin Shu Hao ，弦bleed at the nose of sweet seized AM) FM) ASK Core inflation PSK Tan制features 。信ulcers HUAI snapped embankment Qun Xu malaria tablets using delicious cream changchu destroyed sneeze型compliance turbulent changchu压brazing temperature side of bridge ， exhaust temperature submerged low-hua chiao suspect left Rui turbulent turbulent compliance pupa Xikui weak potato cavity lynx 求。 department turbulent conduct anti中striped text显Rui-ying制satirical features captured ，， Fuzeng brazing Canals Xi现invalid wife of mother
Platform: | Size: 346112 | Author: 郑坤 | Hits:

[VHDL-FPGA-Verilog] FM-ok

Description: VHDL编写的驱动DDS，ad9850的程序，用于产生FM波-VHDL driver prepared DDS, ad9850 procedures used to produce FM wave
Platform: | Size: 318464 | Author: bobo | Hits:

[SCM] Code2

Description: 以SPCE061A单片机为核心，通过DDS合成技术设计制作了一个步进值能任意调节的多功能信号源。该信号源在1KHz～10MHz范围能输出稳定可调的正弦波，并具有AM、FM、ASK和PSK等调制功能-SPCE061A Singlechip to as the core, through the DDS design synthesis technology produced a stepper can arbitrarily adjust the value of multi-purpose signal source. The signal source in the range 1KHz ~ 10MHz output sine wave with adjustable stability, and has AM, FM, ASK and PSK modulation functions, etc.
Platform: | Size: 113664 | Author: suxu | Hits:

[VHDL-FPGA-Verilog] DDS-320-modu

Description: 在采用 320x240 屏的设计实验箱上运行，产生正弦波，调幅调频波形，扫频。-320x240 screen using the design of experiments to run me generate sine wave, AM FM waveforms, sweep.
Platform: | Size: 1250304 | Author: hangyinli | Hits:

[Other Embeded program] at89s51+ad9850+lcd1

Description: 此为DDS AD9851使用at89s51控制之程式,内包含初始频率设定以及键盘等设定,此程式使用AD9851串列传输,内容很完整.-This is the DDS AD9851 using AT89S51 control program, which includes initial frequency settings and keyboard settings, this program using AD9851 serial transmission, the content is complete.
Platform: | Size: 2048 | Author: JERRY | Hits:

[SCM] microcontroller

Description: 本系统以51单片机为控制核心，由正弦信号发生模块、功率放大模块、调幅（AM）、调频（FM）模块、数字键控（ASK，PSK）模块以及测试信号发生模块组成。采用数控的方法控制DDS芯片AD9850产生0Hz－30MHz正弦信号，经滤波、放大和功放模块放大至6v并具有一定的驱动能力。测试信号发生模块产生的1kHz正弦信号经过调幅（AM）模块、调频（FM）模块，对高频载波进行调幅或调频。二进制基带序列信号送入数字键控模块，产生二进制PSK或ASK信号，同时对ASK信号进行解调，恢复出原始数字序列。另外，本系统从简单、调整方便、功能完备为出发点，基本实现了设计中的要求，波形输出较稳定，且精度较高。本设计还配备有LED显示屏、键盘，提供了友好的人机交互界面。 -err
Platform: | Size: 2031616 | Author: 何勇 | Hits:

[Other] DDS

Description: 实现DDS功能性仿真，可以产生正弦波信号，或者线性调频信号-DDS functionality to achieve simulation can generate sine wave signals, or a linear FM signal
Platform: | Size: 4096 | Author: 闫鑫 | Hits:

[VHDL-FPGA-Verilog] dds_9760_ALL1

Description: DDS频率精确步进100HZ，拔码选择FSK，PSK，FM，ASK功能。-dds base on vhdl
Platform: | Size: 4042752 | Author: 李逵 | Hits:

[VHDL-FPGA-Verilog] DDS

Description: FPGA实现直接数字频率合成（DDS），使用EP1C3T144C8通过调试-Cyclone,aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
Platform: | Size: 140288 | Author: qiuwang | Hits:

[VHDL-FPGA-Verilog] dds

Description: 如何利用FPGA产生DDS调频信号很具体的-How to make use of DDS generated FM signal FPGA specific
Platform: | Size: 756736 | Author: 梁梁 | Hits:

[Program doc] FPGA-DDS-FM

Description: DDS 调频信号发生器框图设计原理，有仿真测试结果-DDS signal generator FM Design Principle diagram
Platform: | Size: 69632 | Author: chenjiwei | Hits:

[VHDL-FPGA-Verilog] FPGADDS

Description: dds，FPGA波形发生器,波表，接受，发送-dds, FPGA waveform generator, wave form, to receive, send
Platform: | Size: 540672 | Author: 伟贤 | Hits:

[SCM] dds

Description: 基于DDS的调频调相通过改变频率控制字来控制程序编译过搭过硬件可以实现-FM Based on DDS phase modulation by changing the frequency control word to control the program compiled the hardware can be achieved take-off
Platform: | Size: 459776 | Author: 梁梁 | Hits:

[Software Engineering] DDS-FM-FPGA

Description: DDS介绍,FM信号发生器的设计!基于DDS技术的FM信号发生器的设计及其FPGA实现-DDS introduced, FM Signal Generator! FM signal based on DDS technology and FPGA Implementation Generator
Platform: | Size: 356352 | Author: 雨夜里 | Hits:

[VHDL-FPGA-Verilog] DDS(fsk-ask-psk)

Description: 基于VHDL的波形调制，其中包括调频、调幅，调脉宽等-VHDL-based waveform modulation, including FM, AM, pulse width modulation
Platform: | Size: 6747136 | Author: 王展 | Hits:

[VHDL-FPGA-Verilog] DDS

Description: 能在DDS中用Verilog HDL语言实现FM,AM,FSK,ASK,PSK，结合可编程器件FGPA等等就能实现这些功能 -DDS can be used in Verilog HDL language FM, AM, FSK, ASK, PSK, etc. FGPA programmable devices can be combined to achieve these functions
Platform: | Size: 6281216 | Author: 王凡 | Hits:

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[Other resource] FM-ok

[VHDL-FPGA-Verilog] DDS_信号源

[SCM] SINE_SIGNAL_generator_base_on_Single_Chip_Micyoco.

[SCM] DDS

[SCM] sin

[VHDL-FPGA-Verilog] FM-ok

[SCM] Code2

[VHDL-FPGA-Verilog] DDS-320-modu

[Other Embeded program] at89s51+ad9850+lcd1

[SCM] microcontroller

[Other] DDS

[VHDL-FPGA-Verilog] dds_9760_ALL1

[VHDL-FPGA-Verilog] DDS

[VHDL-FPGA-Verilog] dds

[Program doc] FPGA-DDS-FM

[VHDL-FPGA-Verilog] FPGADDS

[SCM] dds

[Software Engineering] DDS-FM-FPGA

[VHDL-FPGA-Verilog] DDS(fsk-ask-psk)

[VHDL-FPGA-Verilog] DDS

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