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[VHDL-FPGA-Verilog] DE2_USB_API

Description: Altera de2开发板提供的配套软件程序，用PC机上的应用软件来控制开发板外围器件，功能较全面-Altera de2 development board to provide the matching software program, used PC, application software to control the development board peripheral device, function more comprehensive
Platform: | Size: 9212928 | Author: 陈建 | Hits:

[VHDL-FPGA-Verilog] Cursor

Description: ALTERA的DE2平台VGA接口应用，由KEY0－KEY3控制上下左右，使屏幕上光标移动，由Verilog描述。-ALTERA the DE2 platform VGA interface applications, from top to bottom KEY0-KEY3 about control, so that the screen cursor by the Verilog description.
Platform: | Size: 779264 | Author: 徐朝凯 | Hits:

[Picture Viewer] VGAcontroler_for_Sopc_Builder

Description: altera公司的sopc builder VGA 控制器设计-altera company sopc builder VGA controller design
Platform: | Size: 94208 | Author: Morgan | Hits:

[VHDL-FPGA-Verilog] DE2_LCM_CCD

Description: 在altera DE2 的开发板上采集图像，到lcd显示的原程序。-In altera DE2 development board collecting images, lcd display to the original procedure.
Platform: | Size: 3439616 | Author: alison | Hits:

[VHDL-FPGA-Verilog] DE2_LCM_CCD

Description: DE2 CCD数码相机源代码，下载即可使用。方便学习。-DE2 CCD digital camera source code, you can use to download. Facilitate learning.
Platform: | Size: 365568 | Author: 张曦 | Hits:

[VHDL-FPGA-Verilog] DE2_70_TV

Description: --- --- --- -Verilog--- --- ---- This design converts DVD video into a format suitable for display on a CRT/LCD monitor. A DVD video source, such as a DVD player, should be connected to the VIDEO IN port on the DE2-70 board. A CRT/LCD monitor should be connected to the VGA port. The DVD video should be displayed on the monitor. Initially, the video may be shifted vertically press KEY0 to force the design to resynchronize.--------------------Verilog---------------- This design converts DVD video into a format suitable for display on a CRT/LCD monitor. A DVD video source, such as a DVD player, should be connected to the VIDEO IN port on the DE2-70 board. A CRT/LCD monitor should be connected to the VGA port. The DVD video should be displayed on the monitor. Initially, the video may be shifted vertically press KEY0 to force the design to resynchronize.
Platform: | Size: 168960 | Author: Sami | Hits:

[VHDL-FPGA-Verilog] DE2_NIOS_HOST_MOUSE_VGA

Description: 在DE2开发板上实现的VGA输出游戏。硬件用Verilog语言编写，在Quartus上编译；软件用C语言编写，在Nios2上编译运行。把DE2板和显示器键盘连起来即可使用。-Development in the DE2 board game to achieve the VGA output. Hardware using Verilog language, compiled in the Quartus software with C language, compiled to run in Nios2. The DE2 board and display can be used to connect the keyboard.
Platform: | Size: 1627136 | Author: 符玉襄 | Hits:

[Embeded-SCM Develop] wm8731_zhengxianbo

Description: 讲诉了如何编写VERILOG程序通过DE2开发板的wm8731芯片产生正弦波-Talk about how to write VERILOG v. procedure DE2 development board wm8731 chip generated sine wave
Platform: | Size: 33792 | Author: xiaopeng | Hits:

[Graph program] DE2_70_D5M_LTM_black-line

Description: 基于DE2-70的摄像头图像处理程序，主要在边缘检测上增加了视线内黑线判断的功能-Based on the DE2-70 camera image-processing program, mainly in the edge detection increased the black line within the line of sight to determine the function
Platform: | Size: 6322176 | Author: liliang | Hits:

[VHDL-FPGA-Verilog] DM9000A

Description: DM9000的驱动与逻辑，SOPC可用，内含.V文件-DM9000 driver and logic, SOPC available, containing. V file
Platform: | Size: 2048 | Author: 七十二变 | Hits:

[VHDL-FPGA-Verilog] DE2_i2sound

Description: 利用de2实现卡拉OK机（麦克风）的设计用verilog语言编写-Achieved using de2 Kara OK machine (microphones) are designed using verilog language
Platform: | Size: 35840 | Author: 吴鹏 | Hits:

[VHDL-FPGA-Verilog] TRDB_LCM

Description: DE1/DE2的TRDB_LCM驱动Verilog源代码。-DE1/DE2 of TRDB_LCM drive Verilog source code.
Platform: | Size: 248832 | Author: zhouxiao | Hits:

[VHDL-FPGA-Verilog] DE2shijian(5)

Description: FPGA与SOPC设计教程：DE2实践-第五章基于fpga的dsp设计-FPGA and SOPC design tutorials: DE2 Practice- Chapter V of the dsp fpga based design
Platform: | Size: 3558400 | Author: lutangshi | Hits:

[VHDL-FPGA-Verilog] DE2_70_VGA

Description: 在Quartus中，用de2-70开发板下载实现视频图像处理！很值得认真学习！-In the Quartus in development board with the de2-70 image processing for video downloads! Is worthy of serious study!
Platform: | Size: 5120 | Author: tracy | Hits:

[Special Effects] THDB_D5M_CD_v.1.2.0

Description: 分别在DE2,DE2_70等平台上完成TRDB_D5M图像传感器的图像采集和显示工作。-At DE2, DE2_70 other platforms complete TRDB_D5M image sensor image acquisition and display work.
Platform: | Size: 9082880 | Author: 侯娟 | Hits:

[VHDL-FPGA-Verilog] DE2_LCM_CCD_detect_b

Description: 本程序基于Altera公司的DE2平台完成仓库的实时监控并对移动的目标进行自动识别和报警的FPGA设计，研究重点就是图像采集和移动目标识别的FPGA实现。采用Altera公司的DC2模版对视频进行采集并将采集到的图像信息进行缓存，通过监视器实时显示，采用帧间差分法对采集到的帧图像进行运动检测，当仓库中有运动情况的时候，两个图像间灰度会出现异常，通过对灰度异常的侦测完成仓库移动目标的识别并蜂鸣器报警。-Complete real-time monitoring of the warehouse and moving target based on the Altera DE2 platform FPGA design of automatic identification and alarm, the research focus of the image acquisition and recognition of the moving target FPGA implementation. Altera Corporation DC2 template image acquisition and acquisition information to cache the video monitor real-time display, inter-frame difference method for motion detection frames collected, when the movement in the warehouse. between the gray scale in the two images will be abnormal, the warehouse moving target identification grayscale exception detection and buzzer alarm.
Platform: | Size: 19487744 | Author: wangyi | Hits:

[VHDL-FPGA-Verilog] 7_SEGMENTLED

Description: 在DE2开发板上，通过在Altera QuartusII软件中编写.v代码，驱动DE2开发板上的7段数码管。-DE2,verilog,altera quartusII,7segmentled
Platform: | Size: 444416 | Author: | Hits:

[VHDL-FPGA-Verilog] DE2_TEST

Description: v代码源文件工程，用于测试友晶DE2开发板的各个功能，包括LCD，uart,key等-test of altera DE2 development board
Platform: | Size: 8581120 | Author: | Hits:

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[VHDL-FPGA-Verilog] DE2_USB_API

[VHDL-FPGA-Verilog] Cursor

[Picture Viewer] VGAcontroler_for_Sopc_Builder

[VHDL-FPGA-Verilog] DE2_LCM_CCD

[VHDL-FPGA-Verilog] DE2_LCM_CCD

[VHDL-FPGA-Verilog] DE2_70_TV

[VHDL-FPGA-Verilog] DE2_NIOS_HOST_MOUSE_VGA

[Embeded-SCM Develop] wm8731_zhengxianbo

[Graph program] DE2_70_D5M_LTM_black-line

[VHDL-FPGA-Verilog] DM9000A

[VHDL-FPGA-Verilog] DE2_i2sound

[VHDL-FPGA-Verilog] TRDB_LCM

[VHDL-FPGA-Verilog] DE2shijian(5)

[VHDL-FPGA-Verilog] DE2_70_VGA

[Special Effects] THDB_D5M_CD_v.1.2.0

[VHDL-FPGA-Verilog] DE2_LCM_CCD_detect_b

[VHDL-FPGA-Verilog] 7_SEGMENTLED

[VHDL-FPGA-Verilog] DE2_TEST

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