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[VHDL-FPGA-Verilog] crc_verilog

Description: 循环码编码器verilog实现，里面包含有源程序和仿真图。-Cyclic code encoder Verilog realization, which contains the source code and simulation of Fig.
Platform: | Size: 15360 | Author: 萍果 | Hits:

[VHDL-FPGA-Verilog] ds18b20

Description: ds18b20的Verilog程序，经测试验证可以使用。注意此版本为DALLS DS18B20而不是DS1820,注意加5K上拉电阻。-ds18b20 the Verilog process can be used to verify by testing. Note that this version rather than DALLS DS18B20 for DS1820, the attention of Canadian 5K pull-up resistor.
Platform: | Size: 3072 | Author: sdf | Hits:

[VHDL-FPGA-Verilog] ds18b20

Description: 单路DS18B20的verilog HDL 代码，精度为1℃无须转换数据，直接输出结果。占用300个LE资源。-Single DS18B20 the verilog HDL code, and an accuracy of 1 ℃ without converting the data, direct output. Occupy 300 LE resources.
Platform: | Size: 443392 | Author: chenwl | Hits:

[VHDL-FPGA-Verilog] ds18b20_verilog

Description: 用verilog语言编写，实现DS18B20测量温度的程序，包括整个工程文件。-Using verilog language, achieve DS18B20 temperature measurement procedures, and including the project file.
Platform: | Size: 175104 | Author: pangzi | Hits:

[VHDL-FPGA-Verilog] DF2C8_13_DS18B20

Description: verilog实现单总线DS18B20温度测量-verilog DS18B20 temperature measurement single-bus
Platform: | Size: 830464 | Author: mu langs | Hits:

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