Search - DSP VHDL

[Other resource] BASE-T0-VHDL-DSP

Description: 基于VHDL的FSK信号的调制与解调算法实现
Platform: | Size: 1548 | Author: 周成家 | Hits:

[SourceCode] DSP例子

Description: DSP builder samples
Platform: | Size: 143572 | Author: xjcent | Hits:

[DSP program] DCT-DSP

Description: DCT算法在DSP上的实现，汇编语言，在DSP开发板上调试通过-DCT algorithm on DSP realization of assembly language, in DSP development board through debugging
Platform: | Size: 167936 | Author: suobin | Hits:

[DSP program] FIR

Description: 用DSP BUILDER设计的3阶和四阶滤波器-DSP BUILDER designed with 3-order and fourth-order filter
Platform: | Size: 18432 | Author: gillyamylee | Hits:

[VHDL-FPGA-Verilog] Tun2CNk2

Description: FPGA实现DSP的Verilog 示例-FPGA realization of DSP-Verilog Example
Platform: | Size: 331776 | Author: wanghua | Hits:

[VHDL-FPGA-Verilog] FFT-FPGA

Description: 16位定点FFT-DSP的FPGA实现，相关代码和实用说明-16-bit fixed-point FFT-DSP realize the FPGA, the relevant code and practical description
Platform: | Size: 3834880 | Author: 杨合 | Hits:

[DSP program] TI_DSP

Description: TI DSP最小系统原理图，是protel文档，直接可运用，相当好-TI DSP minimum system schematic is Protel documents, can be used directly, quite good
Platform: | Size: 23552 | Author: yxh | Hits:

[Communication-Mobile] dsp-QPSK

Description: 基于DSP的QPSK调制和解调程序，希望会有帮助-Based on DSP-QPSK modulation and demodulation process, I hope will be helpful
Platform: | Size: 5120 | Author: Navy2008_CHINA | Hits:

[DSP program] DSPBuilderreferencemanual

Description: DSP Builder 参考手册,主要用于simulink实现算法后，可将其自动转换为vhdl语言应用。-DSP Builder Reference Manual, mainly for simulink algorithm may be automatically converted to VHDL language applications.
Platform: | Size: 4131840 | Author: zhlm88 | Hits:

[Other] DSP

Description: 学习fpga/cpld的书籍，介绍quartus 2及dsp builder的使用，-Learning fpga/cpld books, introduced quartus 2 and dsp builder use,
Platform: | Size: 14001152 | Author: 彭武军 | Hits:

[VHDL-FPGA-Verilog] DSP_design_based_on_FPGA

Description: 用FPGA设计DSP,2007年上海FPGA高级研修班清华博士贺光辉讲义-FPGA Design with DSP, 2007 in Shanghai FPGA advanced training classes Tsinghua notes Dr. He Guanghui
Platform: | Size: 1352704 | Author: david | Hits:

[VHDL-FPGA-Verilog] DDC_CIC

Description: 用CIC 和 FIR Filters设计的数字下变频器，DSP Builder6.1版工程文件-Using CIC and FIR Filters Design of Digital Down Converter, DSP Builder6.1 version of project file
Platform: | Size: 50176 | Author: 达 | Hits:

[DSP program] sin_cos

Description: Sin & Cos generator (one from DSP steps)
Platform: | Size: 38912 | Author: jools | Hits:

[DSP program] FPGADSPBuilder

Description: DE2平台应用及DSPBUILDER技术，是altera杯上海交大电子设计竞赛内部材料，内含详细设计原理及源代码-DE2 platform and DSP BUILDER technology, Shanghai Jiaotong University altera Cup Electronic Design Contest of internal materials, including the principle of the detailed design and source code
Platform: | Size: 3059712 | Author: lucy | Hits:

[Other] DSP

Description: 很经典的DSP课件，欢迎下载很经典的DSP课件，欢迎下载-DSP software is very classic, please download DSP software is very classic, please download DSP software is very classic, please download
Platform: | Size: 2463744 | Author: 张星刚 | Hits:

[VHDL-FPGA-Verilog] RISC-DSP

Description: RISC-DSP组合处理器设计优化[1].-RISC-DSP processor design portfolio optimization [1].
Platform: | Size: 230400 | Author: 朱伟成 | Hits:

[Program doc] DSP--base--on-FPGA

Description: 这是一本国外的经典教材，讲述了现阶段所有数字信号处理的FPGA实现，从第二章讲述二进制的算法到现阶段数字信号处理的研究热点，基于FPGA实现！包括FIR，自适应滤波，纠错码，调制解调，加密，傅立叶变换等等。更难能可贵的是每个例子都有VHDL和Verilog代码-This is a classic foreign materials, described at this stage all the digital signal processing FPGA, from the second chapter about the binary digital signal processing algorithms to the current stage of research focus, based on FPGA implementation! Including FIR, adaptive filtering, error-correcting codes, modulation and demodulation, encryption, Fourier transform and so on. Even more valuable is that each case has a VHDL and Verilog code! !
Platform: | Size: 7067648 | Author: 刘伟 | Hits:

[VHDL-FPGA-Verilog] FPGA-DSP

Description: vhdl编写的FPGA与DSP接口程序，在FPGA内分配了两块双BUFFER与DSP进行通信-vhdl prepared FPGA and DSP interface program, the FPGA within the allocated 2 pairs of BUFFER to communicate with the DSP
Platform: | Size: 5120 | Author: zhaojun | Hits:

[VHDL-FPGA-Verilog] 3813412-Matlab-Simulink-Simulink-Matlab-to-Vhdl.r

Description: Simulink/Matlab-to-VHDL Route for Full-Custom/FPGA Rapid Prototyping of DSP Algorithms
Platform: | Size: 147456 | Author: T. H. Sutikno | Hits:

[Other] VHDL-FIR-filters

Description: ynthesizable FIR filters in VHDL with a focus on optimal mapping to Xilinx DSP slices. This repository contains a transposed direct form, systolic form for single-rate FIR filters and a custom parallel polyphase FIR decimating filter. The VHDL has been synthesized with Xilinx Vivado 2015.1 to confirm the correct DSP cascade chain is inferred.
Platform: | Size: 37888 | Author: Abkoti | Hits:

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[Other resource] BASE-T0-VHDL-DSP

[SourceCode] DSP例子

[DSP program] DCT-DSP

[DSP program] FIR

[VHDL-FPGA-Verilog] Tun2CNk2

[VHDL-FPGA-Verilog] FFT-FPGA

[DSP program] TI_DSP

[Communication-Mobile] dsp-QPSK

[DSP program] DSPBuilderreferencemanual

[Other] DSP

[VHDL-FPGA-Verilog] DSP_design_based_on_FPGA

[VHDL-FPGA-Verilog] DDC_CIC

[DSP program] sin_cos

[DSP program] FPGADSPBuilder

[Other] DSP

[VHDL-FPGA-Verilog] RISC-DSP

[Program doc] DSP--base--on-FPGA

[VHDL-FPGA-Verilog] FPGA-DSP

[VHDL-FPGA-Verilog] 3813412-Matlab-Simulink-Simulink-Matlab-to-Vhdl.r

[Other] VHDL-FIR-filters

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