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[Other resourceverilogppt

Description: 经典的verilog语言学习课件,介绍了语言的基础知识,和实际中该语言的应用包括DSP 设计中的各个方面.-classic Verilog language-learning courseware, introduced a basic knowledge of language, and the reality of the language of applications including DSP design in all its aspects.
Platform: | Size: 3929749 | Author: hcf2005 | Hits:

[DSP programTMS320C54x DSP 的cpu和外围设备

Description: 针对在FPGA中实现FIR滤波器的关键--乘法运算的高效实现进行了研究,给了了将乘法化为查表的DA算法,并采用这一算法设计了FIR滤波器。通过FPGA仿零点验证,证明了这一方法是可行和高效的,其实现的滤波器的性能优于用DSP和传统方法实现FIR滤波器。最后介绍整数的CSD表示和还处于研究阶段的根据FPGA实现的要求改进的最优表示。-view of the FPGA FIR filters achieve the key-- the multiplication Efficient Implementation of research, to the multiplication of the DA into Lookup algorithm, and using the algorithm design of the FIR filter. FPGA through imitation 0.1 certification proves that the method is feasible and efficient, achieve superior filter performance DSP and traditional FIR filter method. Finally, integral and said the CSD is still in the research stage on the basis of FPGA requirements of the optimal said.
Platform: | Size: 1424384 | Author: 呈一 | Hits:

[VHDL-FPGA-VerilogButterworth_IIR_Filter

Description:
Platform: | Size: 98304 | Author: 代数 | Hits:

[DSP programverilogppt

Description: 经典的verilog语言学习课件,介绍了语言的基础知识,和实际中该语言的应用包括DSP 设计中的各个方面.-classic Verilog language-learning courseware, introduced a basic knowledge of language, and the reality of the language of applications including DSP design in all its aspects.
Platform: | Size: 3929088 | Author: hcf2005 | Hits:

[VHDL-FPGA-VerilogDSP

Description: 从算法设计到硬线逻辑的实现:复杂数字逻辑系统的Verilog HDL设计技术和方法,结合DSP算法介绍verilog HdL 设计。-From algorithm design to achieve hard-wired logic: complex digital logic system Verilog HDL design techniques and methods, combined with DSP algorithm design verilog HdL introduced.
Platform: | Size: 3232768 | Author: 李立 | Hits:

[VHDL-FPGA-Verilogug_ram

Description: RAM design for FPGA in verilog
Platform: | Size: 289792 | Author: NguyenViet | Hits:

[Otherverilog

Description: 引入了Verilog HDL 硬件描述语言,向读者展示一种九十年代才真正开始在美国等先进的工业国家逐步推广的 数字逻辑系统的设计方法。借助于这种方法,在电路设计自动化仿真和综合工具的帮助下, 我们完全有能力设计并制造出有自己知识产权的DSP(数字信号处理)类和任何复杂的数 字逻辑集成电路芯片,为我国的电子工业和国防现代化作出应有的贡献。-The introduction of the Verilog HDL hardware description language, to show the reader a kind of nineties really began in the United States and other advanced industrial countries to gradually extend the digital logic system design. With this method, simulation and integrated circuit design automation tools help, we are fully capable to design and create their own intellectual property rights of DSP (digital signal processing) and any complex digital logic integrated circuit chip, for our electronic industry and make due contributions to national defense modernization.
Platform: | Size: 2217984 | Author: da liu | Hits:

[VHDL-FPGA-VerilogFPGA

Description: FPGA应用开发入门与典型实例 代码 FPGA(现场可编程逻辑器件)以其体积小、功耗低、稳定性高等优点被广泛应用于各类电子产品的设计中。本书全面讲解了FPGA系统设计的背景知识、硬件电路设计,硬件描述语言Verilog HDL的基本语法和常用语句,FPGA的开发工具软件的使用,基于FPGA的软核嵌入式系统,FPGA设计的基本原则、技巧、IP核, FPGA在接口设计领域的典型应用,FPGA+DSP的系统设计与调试,以及数字变焦系统和PCI数据采集系统这两个完整的系统设计案例。 -FPGA Application Development and Typical examples of code for FPGA (field programmable logic device) for its small size, low power consumption, high stability, the advantages are widely used in the design of electronic products. This book comprehensively explained the background FPGA system design, hardware design, hardware description language Verilog HDL syntax and basic common statement, FPGA use of the software development tools, FPGA-based soft-core embedded systems, FPGA design of the basic principles , skills, IP core, FPGA interface design field in a typical application, FPGA+ DSP system design and debug, and digital zoom systems and PCI data acquisition system design of two cases of complete system.
Platform: | Size: 10980352 | Author: 海到无涯 | Hits:

[VHDL-FPGA-Verilogverilog

Description: 基于DSP和FPGA的CCD 图像采集系统设计与实现-FPGA-based DSP and CCD image acquisition system design and implementation
Platform: | Size: 25600 | Author: 郭天然 | Hits:

[OtherTMs320c6713EMIFtoFPGAdualRam

Description: FPGA对C6000DSP的EMIF配置,适合FPGA和DSP双核系统设计参考-Design EMIF of C6000 by Verilog HDL
Platform: | Size: 286720 | Author: 惠言 | Hits:

[Communicationexercise3

Description: 用verilog实现dsp与Fpga接口的同步设计,其功能包括读写操作及四个功能模块,采用两个fifo实现不同时钟域的地址与数据的转换,在quartus ii11.0环境下运行,运行此程序之前需运行将调用fifo。-Dsp using verilog achieve synchronization with Fpga interface design, its features include read and write operations and four functional modules, using two different clock domains to achieve fifo address and data conversion in quartus ii11.0 environment to run, run this program required before running calls fifo.
Platform: | Size: 1441792 | Author: 董明岩 | Hits:

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