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[DSP programDSPTMS320VC5509A5509EMIF

Description: DSP 5509EMIF.rar 源代码-DSP 5509EMIF.rar source code
Platform: | Size: 176128 | Author: 快跑 | Hits:

[DSP programemiftofifo

Description: This program uses the HF flag of a FIFO to trigger reads, guaranteeing that the FIFO is never blocked for the writer, giving high throughput for the reader (bursts of D/2 = 128) and guaranteeing that the the reader will not be stuck in the top half of the FIFO.
Platform: | Size: 2048 | Author: 宋涛 | Hits:

[DSP programDEC6713_SBSRAM

Description: sbsram的测试程序,包含6713的emif和pll配置,开发环境为CCS-sbsram test procedures, including the 6713 and the EMIF pll configuration, development environment for CCS
Platform: | Size: 162816 | Author: 李威 | Hits:

[VHDL-FPGA-VerilogDSP_EMIF_if

Description: fpga开发的程序,内容都不错,主要是top_test-FPGA development process, the contents are good, mainly top_test
Platform: | Size: 1024 | Author: bob | Hits:

[DSP programDEC643_SDRAM

Description: 用dsp实现sdram读写,有EMIF配置信息-Dsp SDRAM read and write with the realization, there EMIF configuration information
Platform: | Size: 463872 | Author: | Hits:

[DSP programEMIF_COM

Description: 实现FPGA与DSP之间通信的接口,利用DSP的标准EMIF接口-the interface for TI DSP and Xilinx s FPGAs
Platform: | Size: 1147904 | Author: 贺冲 | Hits:

[DSP programLab406-speaker

Description: 1.EMIF 接口 TMS320F28335DSP 的扩展存储器接口(EMIF)用来与大多数外围设备进行连接,典型应 用如连接片外扩展存储器等。这一接口提供地址连线、数据连线和一组控制线。ICETEK– F28335-A 将这些扩展线引到了板上的扩展插座上供扩展使用。 2.蜂鸣器由DSP 上EQEP1S 设置为通用I/O 管脚输出控制,可将此管脚上的频率输出转换 成声音输出。 控制的方法是使用 DSP 通用定时器设置EQEP1S 管脚以一定的频率改变高低状态,输 出方波。对于通用定时器周期寄存器的设置,计数值为所需频率计数值的二分之一。 音乐的频率(C 调): C D E F G A B ^C 1 2 3 4 5 6 7 ^1 C: 264, 297, 330,352, 396, 440,495, 528 4. 蜂鸣器的连接:由于选用的蜂鸣器所需电流较小,所以采用将DSP 通用I/O 引脚直接 驱动的方式。-The 1.EMIF interface Extended TMS320F28335DSP memory interface (EMIF) is used to connect with the most peripheral equipment, typical application Extended memory, such as connecting piece. This interface provides the address lines, data lines and a set of control line. ICETEK- F28335-A will lead to the expansion of these extended line socket for plate on the expansion of the use of. 2 buzzer by the DSP EQEP1S set to I/O pin output control, the frequency of output this pin on the conversion A sound output. The control method is to use the DSP generic timer EQEP1S pin changes state level with certain frequency, transmission A square wave. For general timer register settings, count values for the required frequency count of 1/2. The frequency of music (C): C D E F G A B ^C 1234567 ^1 C: 264, 297, 330352, 396, 440495, 528 Connect the 4 buzzer buzzer: as the current required is small, so the DSP I/O pin directly Driving mode.
Platform: | Size: 463872 | Author: hlp | Hits:

[Other使用 EMIF 将 Xilinx FPGA 与 TI DSP 平台接口

Description: 使用 EMIF 将 Xilinx FPGA 与 TI DSP 平台接口(D:\bootstrap\ce8c548c2a73a823101bfd000ce9d9e3)
Platform: | Size: 669696 | Author: xxyyzz0 | Hits:

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