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Description: 68013 Usb2.0芯片Fifo驱动驱动程序源代码-68,013 Usb2.0 SC16CxxBUARTs driver chip driver source code
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Size: 86016 |
Author: Linger |
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Description: 适宜初学者学习,通过调试该代码,可以了解arm9,还有usb总线,同时可以作为开发人员参考资料-suitable for beginners to study and debugging the code can understand arm9, there are usb bus, also can be used as reference for developers
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Size: 112640 |
Author: linmin |
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Description: 这是基于CY7C68013芯片,工作于slave FIFO模式的数据传输的程序。包括USB固件程序的程序框架和传输功能实现程序。-This is based on the CY7C68013 chip, working in slave FIFO mode data transfer procedure. Including USB firmware framework of the procedure and transfer function realization procedures.
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Size: 17408 |
Author: 张梓剑 |
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Description: 本组程序包括FPGA程序,固件程序和上位机程序,实现USB的数据传输功能,采用Slave Fifo模式,上位机程序利用Cypress公司提供的库函数进行开发-In this group include FPGA, firmware, procedures and PC procedures realize USB data transfer function, the Slave Fifo mode, host computer program using Cypress library functions provided by the company to develop
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Size: 5099520 |
Author: 林颖 |
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Description: 用Keil C语言编写的EZ-USB CyC768013芯片 slave FIFO模式的固件程序-Keil C language using the EZ-USB CyC768013 chip slave FIFO mode firmware
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Size: 70656 |
Author: 蔡白银1 |
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Description: 使用68013的测试程序,包含68013固件程序(采用slave FIFO bulk同步读写,EP2 OUT,EP6 IN),驱动,PC端测试用程序。CPLD的VHDL代码-Test procedures for the use of 68,013, including 68,013 firmware (using the synchronous slave FIFO bulk read and write, EP2 OUT, EP6 IN), driver, PC-side test procedures. VHDL code of CPLD
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Size: 4731904 |
Author: 李华 |
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Description: Cy7c68013的一个数据采集的方案,里面有方案USB的固件,驱动,以及上位机程序-CY7C68013 a data acquisition program, there are programs USB firmware, drivers, as well as the PC program
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Size: 4141056 |
Author: 清木 |
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Description: 一个FIFO源代码,基于Altera FPGA-A FIFO source code, based on Altera FPGA
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Size: 1024 |
Author: jiashengwen |
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Description: USB 到 UART 协议转换程序 [简易的 - 少量的FIFO]
目标 MCU :AT90S2313-10-USB to UART protocol conversion process [simple- a small number of FIFO] target MCU: AT90S2313-10
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Size: 17408 |
Author: tong |
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Description: VC5416 对USB寄存器的读/写、配置;
VC5416 对 USB的 FIFO 的操作;
VC5416 对 USB的 setup 包的操作;
VC5416 对 USB的 Endpointo 的操作;-VC5416 of USB register read/write, configuration
VC5416 on the USB-FIFO operation VC5416 for USB operation of the setup packet
VC5416 for USB operation of Endpointo
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Size: 181248 |
Author: fishsky |
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Description: USBHostSlave is a USB 1.1 host and Device IP core.
– Supports full speed (12Mbps) and low speed (1.5Mbps) operation.
– USB Device has four endpoints, each with their own independent FIFO.
– Supports the four types of USB data transfer control, bulk, interrupt, and isochronous
transfers.
– Host can automatically generate SOF packets.
– 8-bit Wishbone slave bus interface.
– FIFO depth configurable via paramters.-USBHostSlave is a USB 1.1 host and Device IP core.
– Supports full speed (12Mbps) and low speed (1.5Mbps) operation.
– USB Device has four endpoints, each with their own independent FIFO.
– Supports the four types of USB data transfer control, bulk, interrupt, and isochronous
transfers.
– Host can automatically generate SOF packets.
– 8-bit Wishbone slave bus interface.
– FIFO depth configurable via paramters.
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Size: 6144 |
Author: polito |
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Description: FX2Pipe is a small high speed USB transfer program which can pipe stdin into the FX2 FIFO or back from the FIFO to stdout.
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Size: 168960 |
Author: manta |
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Description: DSP uart窗口通信中的一种通信格式,FIFO模式的一个小程序-dsp serial communication uart communication first in first out-FIFO mode
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Size: 4096 |
Author: luoxin |
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Description: 基于USB接口Slave FIFO模式的核谱数据采集研究
-Slave FIFO Interface USB-based model study of nuclear spectroscopy data acquisition
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Size: 4004864 |
Author: 三米 |
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Description: usb2.0的传输的固件程序,驱动和主机程序的源码,usb芯片为cy7c68013 fifo模式-usb2.0 slove
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Size: 5550080 |
Author: song |
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Description: USB电压表的应用: USB接口硬件 和 VC开发的上位机软件,组成监控界面-USB voltage meter applications: USB interface, hardware and VC software developed by the upper plane to form a monitoring interface
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Size: 335872 |
Author: guoj |
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Description: 在高速的数据采集或传输中,目前使用较多的都是采用USB 2.0接口控制器和FPGA或DSP实现的,本设计在USB 2.0接口芯片CY7C68013的Slave FIFO模式下,利用FPGA作为外部主控制器实现对FX2 USB内部的FIFO进行控制,以实现数据的高速传输。该模块可普遍适用于基于USB 2.0接口的高速数据传输或采集中。-In the high-speed data acquisition or transmission, the currently used are based on more USB 2.0 interface controller and the FPGA or DSP implementation, the design USB 2.0 interface chip CY7C68013 of the Slave FIFO mode, the use of FPGA as a the external FX2 USB host controller to realize the internal FIFO control, in order to achieve high-speed data transmission. The module can be generally applied based on high-speed USB 2.0 interface, transfer or acquisition of data.
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Size: 894976 |
Author: jiang_jennifer |
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Description: fifo用Verilog hdl的实现,这是一个比较常用的源码,文档中有很详细的注释,初学者应该可以看懂。-implementation using Verilog hdl usb, this is a common source, the document had a very detailed notes, beginners should understand.
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Size: 6144 |
Author: zhulyan580086 |
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Description: verilog code fifo memory usb
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Size: 4096 |
Author: mohsen |
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Description: EZUSB开发总结-固件部分,包含EZUSB开发中固件设计,个人小结,适合初学者快速入门,包含FX2 Slave FIFO,Slave FIFO Firmware及一些资料 -EZUSB Development Summary- firmware part, including EZUSB development of firmware design, personal summary, quick start for beginners, including FX2 Slave FIFO, Slave FIFO Firmware and some information
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Size: 349184 |
Author: 嘻哈天王 |
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