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[DSP programTMS320C54x DSP 的cpu和外围设备

Description: 针对在FPGA中实现FIR滤波器的关键--乘法运算的高效实现进行了研究,给了了将乘法化为查表的DA算法,并采用这一算法设计了FIR滤波器。通过FPGA仿零点验证,证明了这一方法是可行和高效的,其实现的滤波器的性能优于用DSP和传统方法实现FIR滤波器。最后介绍整数的CSD表示和还处于研究阶段的根据FPGA实现的要求改进的最优表示。-view of the FPGA FIR filters achieve the key-- the multiplication Efficient Implementation of research, to the multiplication of the DA into Lookup algorithm, and using the algorithm design of the FIR filter. FPGA through imitation 0.1 certification proves that the method is feasible and efficient, achieve superior filter performance DSP and traditional FIR filter method. Finally, integral and said the CSD is still in the research stage on the basis of FPGA requirements of the optimal said.
Platform: | Size: 1424384 | Author: 呈一 | Hits:

[VHDL-FPGA-VerilogFPGA_FIR

Description: VHDL语言编写的FIR滤波器源码 对于嵌入式设计者有很好的指导作用 -VHDL prepared by the FIR filter source for Embedded designers have a good role in guiding
Platform: | Size: 152576 | Author: 冯申 | Hits:

[Other Embeded program01_GettingStarted

Description: This getting started exercise will guide you through the step-by-step process of transforming a MATLAB floating-point model into a hardware module that can be implemented in silicon (FPGA or ASIC). The design is a general purpose FIR filter taken from the AccelDSP Examples directory.-This exercise will guide y ou through the step-by-step process of transfo rming a MATLAB floating-point model into a hard ware module that can be implemented in silicon ( FPGA or ASIC). The design is a general purpose FI R filter taken from the AccelDSP Examples direc tory.
Platform: | Size: 5120 | Author: 杨平 | Hits:

[Software Engineeringfirfilterdesignoffpga

Description: 提出了一种基于FPGA的高阶高速F IR滤波器的设计与实现方法。通过一个169阶的均方根 升余弦滚降滤波器的设计,介绍了如何应用流水线技术来设计高阶高速F IR滤波器,并且对所设计的 FIR滤波器性能、资源占用进行了分析。-A high-level FPGA-based high-speed F IR filter design and implementation. Through a 169-order root mean square raised cosine filter roll-off design, describes how the application of technology to design high-end line of high-speed F IR filter, and for the design of FIR filter performance, resources to carry out an analysis of the occupier.
Platform: | Size: 208896 | Author: 王晓岚 | Hits:

[VHDL-FPGA-Verilogfir

Description: FIR数字滤波器程序,采用vhdl编写,可用于FPGA电路-FIR digital filter procedure for the preparation of VHDL can be used in FPGA circuit
Platform: | Size: 173056 | Author: zhao onely | Hits:

[Booksfir_filter

Description: fpga实例体验,一些关于fpga的例子,对新手可能有所帮助-Examples of FPGA experience, some examples on the FPGA, may be helpful to the novice
Platform: | Size: 595968 | Author: yugaoshang | Hits:

[File FormatFIR_FPGA

Description: 介绍FIR滤波器的FPGA高效实现和巧妙验证,不错-FIR filter FPGA introduced to achieve efficient and ingenious authentication, good
Platform: | Size: 283648 | Author: yautou | Hits:

[VHDL-FPGA-VerilogEDA

Description: 里面是一个FIR滤波器的设计报告 里面有具体的 代码 等等 加法器 乘法器 见发起 等等 承平-There is a FIR filter design report there are specific code adder multiplier, etc., etc., see Cheng-Ping initiated
Platform: | Size: 189440 | Author: 丛宇 | Hits:

[Embeded-SCM DevelopFIR

Description: 主要讲述了FPGA在数字滤波器 特别是FIR滤波器方面的设计 ,仿真以及实现,还分别介绍了乘法 加法的原理及框图-Focuses on the FPGA in the digital filter in particular aspects of FIR filter design, simulation and realization, but also introduced the principle of addition and multiplication diagram
Platform: | Size: 4199424 | Author: aaa | Hits:

[VHDL-FPGA-VerilogDA_FIR

Description: 基于分布式算法的FPGA实现的FIR滤波器源码,VHDL语言编写的,下载工程文件后可直接在QuartusII7.0上运行。-Based on Distributed algorithms realize the FIR filter FPGA source code, VHDL language, download the project file can be run directly in QuartusII7.0.
Platform: | Size: 531456 | Author: CH | Hits:

[Software EngineeringFPGAFIR

Description: FPGA-based high-order FIR filter design
Platform: | Size: 4537344 | Author: 玉玲 | Hits:

[VHDL-FPGA-VerilogFIR

Description: 基于FPGA的FIR滤波器设计思想,里面有很好的算法供大家参考-FPGA-based FIR filter design ideas, there are very good for your reference algorithm
Platform: | Size: 628736 | Author: 菠萝 | Hits:

[matlabfilter

Description: 这是基于MATLAB下的XILINX的FPGA的FIR滤波器的模型设计文件-This is a MATLAB-based FPGA of the XILINX Model of the FIR filter design documents
Platform: | Size: 268288 | Author: xueanxi | Hits:

[VHDL-FPGA-VerilogMyFilter

Description: FPGA实现数字滤波器,用VHDL语言实现的直接1型FIR滤波器,具有较好的参考价值。-FPGA realization of digital filters using VHDL language to achieve the direct FIR filter type 1, has a good reference value.
Platform: | Size: 2048 | Author: 胡佳 | Hits:

[VHDL-FPGA-VerilogFIR-filter-using-fpga-design

Description: 基于FPGA的高阶FIR滤波器设计4有matlab设计步骤 4.3更详细 第六章量化系数实例-FIR using FPGA ,QuartusII software
Platform: | Size: 4539392 | Author: 星空心晴之夏 | Hits:

[VHDL-FPGA-Verilogfir-filter-design-using-fpga-with-MAX-Plus2

Description: 基于FPGA的高阶FIR滤波器设计用max-plus -II软件仿真-fir filter using fpga with max-plusII
Platform: | Size: 2334720 | Author: 星空心晴之夏 | Hits:

[VHDL-FPGA-VerilogFPGA-FIR

Description: FIR滤波器,算法,采用VHDL编程语言,算法比较简单,希望对大家有所帮助。-FIR filter algorithm, using VHDL programming language, the algorithm is simple, we want to help.
Platform: | Size: 1185792 | Author: math | Hits:

[VHDL-FPGA-Verilogfir-and-iir

Description: FPGA关于数字滤波器设计,FIR的FPGA实现及其Quartus与MATLAB仿真-FPGA on the digital filter design, FIR s Quartus FPGA Implementation and Simulation with MATLAB
Platform: | Size: 5149696 | Author: 方明 | Hits:

[VHDL-FPGA-Verilogfir filter design

Description: FIR FILTER DESIGN IN VERILOG ON FPGA
Platform: | Size: 18432 | Author: GIRISH | Hits:

[VHDL-FPGA-VerilogFIR设计实现sgh

Description: FIR滤波FPGA实现 ,已在仿真软件上验证实现,不是IP核,不是ip核。(FIR filter FPGA implementation, has been verified in the simulation software, not IP core, not IP core.)
Platform: | Size: 25600 | Author: 韩冻少 | Hits:
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