Search - FM VHDL

[Other resource] FM-ok

Description: VHDL编写的驱动DDS，ad9850的程序，用于产生FM波
Platform: | Size: 318268 | Author: bobo | Hits:

[VHDL-FPGA-Verilog] DDS_信号源

Description: dds 精确步进100HZ.拨码开关选择FSK,FM等功能.最高频率25M,DA芯片9760.VHDL编写
Platform: | Size: 5324098 | Author: wuyunzheng | Hits:

[VHDL-FPGA-Verilog] simple_fm_receiver.tar

Description: FM收音机的解码及控制器VHDL语言实现，Xilinx提供的．别谢我．-FM radio decoder and controller VHDL, Xilinx provide. I thank other.
Platform: | Size: 70656 | Author: 喻袁洲 | Hits:

[VHDL-FPGA-Verilog] FM-ok

Description: VHDL编写的驱动DDS，ad9850的程序，用于产生FM波-VHDL driver prepared DDS, ad9850 procedures used to produce FM wave
Platform: | Size: 318464 | Author: bobo | Hits:

[VHDL-FPGA-Verilog] all_digital_fm_receiver.tar

Description: 全数字fM接受机包括，测试代码，说明文档，还有源代码-All-digital FM receivers, including, test code, documentation, and source code
Platform: | Size: 669696 | Author: 聂样 | Hits:

[VHDL-FPGA-Verilog] DDS-320-modu

Description: 在采用 320x240 屏的设计实验箱上运行，产生正弦波，调幅调频波形，扫频。-320x240 screen using the design of experiments to run me generate sine wave, AM FM waveforms, sweep.
Platform: | Size: 1250304 | Author: hangyinli | Hits:

[VHDL-FPGA-Verilog] kuoping

Description: fpga嵌入式设计扩频接收机设计有matlab 和vhdl 对比情况-Design of spread-spectrum receiver embedded FPGA design and VHDL contrast matlab
Platform: | Size: 363520 | Author: 龙丽丽 | Hits:

[Audio program] simple_fm_receiver.tar

Description: 一个简单FM接收机的VHDL源码，很有参考意义-A simple FM receiver VHDL source code is very useful
Platform: | Size: 632832 | Author: metallica | Hits:

[VHDL-FPGA-Verilog] dds_9760_ALL1

Description: DDS频率精确步进100HZ，拔码选择FSK，PSK，FM，ASK功能。-dds base on vhdl
Platform: | Size: 4042752 | Author: 李逵 | Hits:

[Software Engineering] ZX

Description: 本系统以51单片机及FPGA为控制核心，由正弦信号发生模块、功率放大模块、调幅（AM）、调频（FM）模块、数字键控（ASK，PSK）模块以及测试信号发生模块组成-The system of 51 single-chip and FPGA for the control of the core module by the sinusoidal signal, power amplifier module, AM (AM), frequency modulation (FM) module, digital keying (ASK, PSK) signal modules and test modules
Platform: | Size: 105472 | Author: 123 | Hits:

[VHDL-FPGA-Verilog] dds_9760_OK

Description: ＤＤＳ信号源程序，用ＶＨＤＬ编的。里面可用拨码开关选择相应的功能：ＦＭ，ＡＳＫ，ＰＳＫ，ＡＭ（这一点实现的不是很好），但其它的很好。频率可达２５Ｍ-DDS signal source, for the use of VHDL. DIP switch which can be used to select the appropriate function: FM, ASK, PSK, AM (This is not to achieve good), but other well. Frequency of up to 25M
Platform: | Size: 5096448 | Author: 李逵 | Hits:

[VHDL-FPGA-Verilog] dds

Description: 如何利用FPGA产生DDS调频信号很具体的-How to make use of DDS generated FM signal FPGA specific
Platform: | Size: 756736 | Author: 梁梁 | Hits:

[Program doc] FPGA-DDS-FM

Description: DDS 调频信号发生器框图设计原理，有仿真测试结果-DDS signal generator FM Design Principle diagram
Platform: | Size: 69632 | Author: chenjiwei | Hits:

[VHDL-FPGA-Verilog] fm

Description: VHDL设计全数字FM接收机资料大小：650KB 运行环境：Windows -VHDL design of all-digital FM receiver Data Size: 650KB operating environment: Windows
Platform: | Size: 665600 | Author: 古月 | Hits:

[Communication-Mobile] FMreceiver

Description: FM receiver VHDL code
Platform: | Size: 775168 | Author: nan | Hits:

[VHDL-FPGA-Verilog] dds_final

Description: 使用Verilog HDL语言实现的一个DDS，可以发生0-10Mhz正弦波、方波、三角波，频率步进可调，FM调制、AM调制，调制度可调。DA芯片为8位并行，160MHz-Using the Verilog HDL language implementation of a DDS, can occur 0-10Mhz sine, square, triangle wave, frequency step tunable, FM modulation, AM modulation, adjustable modulation. DA-chip 8-bit parallel, 160MHz
Platform: | Size: 1638400 | Author: nostalgia | Hits:

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