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[Software Engineering] d

Description: 这也是一个很不错的技术文档 关于FPGA
Platform: | Size: 263440 | Author: 马占 | Hits:

[Other resource] d

Description: Implement of SRM Position Check ing Ar ithmetic Ba sed on FPGA
Platform: | Size: 334386 | Author: fanningjia | Hits:

[Other resource] 基于FPGA的直接数字合成器设计

Description: 1、 利用FLEX10的片内RAM资源，根据DDS原理，设计产生正弦信号的各功能模块和顶层原理图； 2、 利用实验板上的TLC7259转换器，将1中得到的正弦信号，通过D/A转换，通过ME5534滤波后在示波器上观察； 3、 输出波形要求： 在输入时钟频率为16KHz时，输出正弦波分辨率达到1Hz； 在输入时钟频率为4MHz时，输出正弦波分辨率达到256Hz； 4、 通过RS232C通信，实现FPGA和PC机之间串行通信，从而实现用PC机改变频率控制字，实现对输出正弦波频率的控制。-a use FLEX10-chip RAM resources, in accordance with DDS principle, design sinusoidal signal generated by the top-level functional modules and schematics; 2, the experimental board TLC7259 converters, will be a sinusoidal signal, the D / A conversion, after filtering through the ME5534 oscilloscope observation; 3, the output waveform requirements : the input clock frequency of 16KHz, sine wave output resolution of 1Hz; the input clock frequency of 4MHz, the sine wave output resolution of 256Hz; 4, RS232C communications, FPGA and PC serial communications between in order to achieve PC-frequency control characters, the realization of sine wave output frequency control.
Platform: | Size: 22183 | Author: 竺玲玲 | Hits:

[VHDL-FPGA-Verilog] 基于FPGA的直接数字合成器设计

Description: 1、 利用FLEX10的片内RAM资源，根据DDS原理，设计产生正弦信号的各功能模块和顶层原理图； 2、 利用实验板上的TLC7259转换器，将1中得到的正弦信号，通过D/A转换，通过ME5534滤波后在示波器上观察； 3、 输出波形要求： 在输入时钟频率为16KHz时，输出正弦波分辨率达到1Hz； 在输入时钟频率为4MHz时，输出正弦波分辨率达到256Hz； 4、 通过RS232C通信，实现FPGA和PC机之间串行通信，从而实现用PC机改变频率控制字，实现对输出正弦波频率的控制。-a use FLEX10-chip RAM resources, in accordance with DDS principle, design sinusoidal signal generated by the top-level functional modules and schematics; 2, the experimental board TLC7259 converters, will be a sinusoidal signal, the D/A conversion, after filtering through the ME5534 oscilloscope observation; 3, the output waveform requirements : the input clock frequency of 16KHz, sine wave output resolution of 1Hz; the input clock frequency of 4MHz, the sine wave output resolution of 256Hz; 4, RS232C communications, FPGA and PC serial communications between in order to achieve PC-frequency control characters, the realization of sine wave output frequency control.
Platform: | Size: 21504 | Author: 竺玲玲 | Hits:

[matlab] 13lab03

Description: 一组开发基于XILINX FPGA开发DSP算法的应用资料，具有实用性，可操作性。（3）-a group Xilinx FPGA-based DSP algorithm development of the information is useful, operability. (3)
Platform: | Size: 308224 | Author: zhangxing | Hits:

[SCM] AD_ASM_AD0832shuzidianyabiaoLED

Description: 数字电压表 AD芯片： 采用8位串行A/D转换器ADC0832。 ● 8位分辨率，逐次逼近型，基准电压为 5V ● 5V单电源供电 ● 输入模拟信号电压范围为 0～5V ● 有两个可供选择的模拟输入通道 显示： 使用三个数码管。 显示范围： 0.00 － 5.10 （单位：V） 连接方式： AD_CLK → P1.0 AD_DAT → P1.1 AD_CS → P3.4 模拟输入 → CH0 (AD_DAT = DO + DI) ADC0832输出最大转换值＝FFH (255) 设定最大测量值＝5.1V 255X=5.1 X=0.02 即先乘2再除以100 （小数点放在第三位数码管）- Digital voltmeter AD chip: Uses 8 serial A/D switch ADC0832.* 8 resolution, gradually approaching, the datum voltage is 5V* the 5V single power source power supply* input simulated signal voltage scope is 0 ~ 5V* has two to be possible to supply the choice the analog input channel Demonstrated: Uses three digital tubes. Demonstrates the scope: 0.00- 5.10 (unit: V) Connection way: AD_CLK-> P1.0 AD_DAT-> P1.1 AD_CS-> P3.4 analog input-> CH0 (AD_DAT = DO DI) ADC0832 output biggest transformation value = FFH (255) establishes greatest observed value = 5.1V 255X=5.1 X=0.02 namely first to ride 2 to eliminate again by 100 (decimal point puts on third digital tube)
Platform: | Size: 7168 | Author: lmhit | Hits:

[assembly language] EXPT84_DAC2ADC

Description: FPGA+DA转换,ALTERA公司FPGA与DA实现,DA转换功能!-FPGA+ DA conversion, ALTERA company FPGA and DA realize, DA conversion!
Platform: | Size: 16384 | Author: 19820521 | Hits:

[Embeded-SCM Develop] expt12_5_rsv

Description: 基于fpga和sopc的用VHDL语言编写的EDA采样高速A/D的存储示波器-FPGA and SOPC based on the use of VHDL language EDA sampling high-speed A/D of the storage oscilloscope
Platform: | Size: 58368 | Author: 多幅撒 | Hits:

[VHDL-FPGA-Verilog] FPGA-based-DAC

Description: 用fpga实现的DA转换器，有说明和源码，VDHL文件。 A PLD Based Delta-Sigma DAC Delta-Sigma modulation is the simple, yet powerful, technique responsible for the extraordinary performance and low cost of today s audio CD players. The simplest Delta-Sigma DAC consists of a Delta-Sigma modulator and a one bit DAC. Since, both of these components can be realized using digital circuits, it is possible to implement a low precision Delta-Sigma DAC using a PLD.-Using FPGA to achieve the DA converter, has descriptions and source code, VDHL document. A PLD Based Delta-Sigma DACDelta-Sigma modulation is the simple, yet powerful, technique responsible for the extraordinaryperformance and low cost of today s audio CDplayers. The simplest Delta-Sigma DAC consists of aDelta-Sigma modulator and a one bit DAC. Since , both of these components can be realized usingdigital circuits, it is possible to implement a lowprecision Delta-Sigma DAC using a PLD.
Platform: | Size: 58368 | Author: 开心 | Hits:

[VHDL-FPGA-Verilog] FPGA-LCD1602

Description: 基于FPGA的LCD1602显示，可根据实际内容修改显示内容-FPGA-based LCD1602 display can be modified according to the actual contents of display content
Platform: | Size: 489472 | Author: 冀少威 | Hits:

[VHDL-FPGA-Verilog] fpga

Description: 无线光通信技术具有通信容量大、传输速率高等众多优点, 在许多场合都有重要的应用, 是现代通信技术研究的一个热点。由于脉冲位置调制 ( PPM ) 有较高的平均功率利用率和抗干扰能力, 故 PPM是无线光通信系统中常用的调制方式。在研究 PPM调制技术的基础上, 就基于 FPG A的无线光通信 PPM调制系统进行设计, 并用 V H D L语言完成了系统的设计和仿真。仿真结果表明, 该设计具有正确性和合理性。-Wireless optical communication technology has the communications capacity, many of the benefits of higher transmission rates, in many occasions have important applications in modern communication technologies are a hot research. Because of pulse position modulation (PPM) have a higher average power utilization and anti-interference ability, so PPM is a wireless optical communication system commonly used in modulation. PPM modulation technique in the study on the basis of FPG A based on wireless optical communication PPM modulation system design, and VHDL language achieve the system design and simulation. Simulation results show that the rationality of the design right.
Platform: | Size: 194560 | Author: 朱雯 | Hits:

[DSP program] EMIF_COM

Description: 实现FPGA与DSP之间通信的接口,利用DSP的标准EMIF接口-the interface for TI DSP and Xilinx s FPGAs
Platform: | Size: 1147904 | Author: 贺冲 | Hits:

[VHDL-FPGA-Verilog] FPGA-DE1-PACMAN

Description: Pacman 4 DE1-FPGA-Board
Platform: | Size: 943104 | Author: bert1970 | Hits:

[Books] dds

Description: FPGA实现DDS，f=90kHZ~5MHZ范围-FPGA realization of DDS, f = 90kHZ ~ 5MHZ the scope of
Platform: | Size: 1442816 | Author: 王勤 | Hits:

[Software Engineering] FPGA

Description: 为了满足科研与实验需要,提出并实现了一种以FPGA和高速D/A为核心,其结构简单,控制灵活,信号质量高的多功能信号源生成系统。该信号源生成系统能够实时产生中心频率在30~130 MHz的各种雷达、通信、导航和白噪声等信号,且产生的各种信号频率、幅度、相位和其他参数均可控。信号源作为基带信号单元配以混频模块,可实现在任意频段的信号。另外,该信号源还可以作为一个通用平台,通过FPGA内部程序的更新来实现其他复杂信号。-This paper presents and makes a multi-functional signal source based on FPGA and high speed D/A which has simple configuration,flexible controlling,and top-quality signals to satisfy needs of the scientific research and experiment.This signal source can generate several signals as radar signals,communication signals,navigation signals,noise signals and so on.These signals have center frequency between 30~130 MHz,its frequency,power,phase and other parameters are adjustable.This signal source can also ...
Platform: | Size: 330752 | Author: 将建 | Hits:

[VHDL-FPGA-Verilog] D_latch

Description: 周立功 ACTEl FPGA做的一个D触发器程序-ZLG ACTEl FPGA program to do a D flip-flop
Platform: | Size: 770048 | Author: 张金 | Hits:

[VHDL-FPGA-Verilog] FPGA--SIGNAL-FFT-FIR

Description: 目前,在极高频率的电子装置或系统中不能采用数字信号处理的原因有两个:一是A/D转换器的速度不能达到足够快 二是信号处理任务太复杂,达不到实时处理的要求.-At present, in the high frequency of the electronic device or system cannot use the digital signal processing for two reasons: one is the A/D converter cannot reach the speed of fast enough Second is the signal processing tasks too complex, can not reach the real-time process requirements.
Platform: | Size: 20480 | Author: 飞翔 | Hits:

[VHDL-FPGA-Verilog] 基于FPGA的彩色符号设计

Description: a、设计可显示横彩条和纵彩条的VGA彩条信号； b、设计可显示英语字母的VGA彩条信号； c、设计可显示移动彩色斑点的VGA彩条信号； d、设计可实现手动切换a、b、c三个功能.(The design can display VGA color color and color of the longitudinal cross signal. The design can display the VGA color signal of the English alphabet. The design can display the VGA color signal of mobile color spots.)
Platform: | Size: 435200 | Author: ciuciuciu | Hits:

[Other] 使用 EMIF 将 Xilinx FPGA 与 TI DSP 平台接口

Description: 使用 EMIF 将 Xilinx FPGA 与 TI DSP 平台接口(D:\bootstrap\ce8c548c2a73a823101bfd000ce9d9e3)
Platform: | Size: 669696 | Author: xxyyzz0 | Hits:

[VHDL-FPGA-Verilog] FPGA黑金开发板AX301原理图

Description: 掌 握 V e r i l o g H D L 语 言 需 要 的 不 只 是 技 术 而已 ， 最 重 要 是 那 颗 安 静 的 心 ， 安 静 的 心 会 带 读 者 乘 风 破 浪 ， 一 方 通 行 。 此 外 记 录 笔 记 的习 惯 更 为 重 要 ， 向 自 己 学 习 比 起 向 他 人 学 习 更 有 学 习 的 价 值 。(It is not only the skill that is required to hold V e r I l o g H D l, but the most important thing is the quiet heart, the quiet heart will take the reader in the wind to break the waves, and the one side will pass.The habit of recording and recording is more important, and it is more valuable to learn from him than to learn from him.)
Platform: | Size: 117760 | Author: 你四哥 | Hits:
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