Search - FPGA URAT

[Other resource] digitalinterfaceuart

Description: 文件说明了在fpga/cpld中怎样实现数据接口及其实例了urat-note of the document they simply / cpld How Data Interface and the examples of urat
Platform: | Size: 2954 | Author: liu | Hits:

[File Operate] FPGA_27eg

Description: FPGA很有价值的27实例.rar 包括 LED控制VHDL程序与仿真 2004.8修改.doc； LED控制VHDL程序与仿真； LCD控制VHDL程序与仿真 2004.8修改； LCD控制VHDL程序与仿真； ADC0809 VHDL控制程序； TLC5510 VHDL控制程序； DAC0832 接口电路程序； TLC7524接口电路程序； URAT VHDL程序与仿真； ASK调制与解调VHDL程序及仿真； FSK调制与解调VHDL程序及仿真； PSK调制与解调VHDL程序及仿真； MASK调制VHDL程序及仿真； MFSK调制VHDL程序及仿真； MPSK调制与解调VHDL程序与仿真；基带码发生器程序设计与仿真；频率计程序设计与仿真；采用等精度测频原理的频率计程序与仿真；电子琴程序设计与仿真 2004.8修改；电子琴程序设计与仿真；电梯控制器程序设计与仿真；电子时钟VHDL程序与仿真；自动售货机VHDL程序与仿真；出租车计价器VHDL程序与仿真 2004.8修改；出租车计价器VHDL程序与仿真；波形发生程序；步进电机定位控制系统VHDL程序与仿-FPGA value of the 27 examples. Rar including LED control procedures and VHDL simulation 200 4.8 amendments. doc; LED control procedures and VHDL simulation; LCD control procedures and VHDL simulation 2004.8 modified; LCD control procedures and VHDL simulation; Connection between ADC 0809 VHDL control procedures; TLC5510 VHDL control procedures; DAC0832 interface circuits; TLC7524 interface circuits; URAT procedures and VHDL simulation; ASK modulation and demodulation process and VHDL simulation; FSK modulation and demodulation process and VHDL simulation; PSK modulation and demodulation process and VHDL simulation; MASK modulation procedures and VHDL simulation; MFSK modulation procedures and VHDL simulation; MPSK modulation and demodulation process and VHDL simulation; Base-band code gene
Platform: | Size: 1279333 | Author: 高 | Hits:

[VHDL-FPGA-Verilog] digitalinterfaceuart

Description: 文件说明了在fpga/cpld中怎样实现数据接口及其实例了urat-note of the document they simply/cpld How Data Interface and the examples of urat
Platform: | Size: 3072 | Author: liu | Hits:

[File Format] FPGA_27eg

Description: FPGA很有价值的27实例.rar 包括 LED控制VHDL程序与仿真 2004.8修改.doc； LED控制VHDL程序与仿真； LCD控制VHDL程序与仿真 2004.8修改； LCD控制VHDL程序与仿真； ADC0809 VHDL控制程序； TLC5510 VHDL控制程序； DAC0832 接口电路程序； TLC7524接口电路程序； URAT VHDL程序与仿真； ASK调制与解调VHDL程序及仿真； FSK调制与解调VHDL程序及仿真； PSK调制与解调VHDL程序及仿真； MASK调制VHDL程序及仿真； MFSK调制VHDL程序及仿真； MPSK调制与解调VHDL程序与仿真；基带码发生器程序设计与仿真；频率计程序设计与仿真；采用等精度测频原理的频率计程序与仿真；电子琴程序设计与仿真 2004.8修改；电子琴程序设计与仿真；电梯控制器程序设计与仿真；电子时钟VHDL程序与仿真；自动售货机VHDL程序与仿真；出租车计价器VHDL程序与仿真 2004.8修改；出租车计价器VHDL程序与仿真；波形发生程序；步进电机定位控制系统VHDL程序与仿-FPGA value of the 27 examples. Rar including LED control procedures and VHDL simulation 200 4.8 amendments. doc; LED control procedures and VHDL simulation; LCD control procedures and VHDL simulation 2004.8 modified; LCD control procedures and VHDL simulation; Connection between ADC 0809 VHDL control procedures; TLC5510 VHDL control procedures; DAC0832 interface circuits; TLC7524 interface circuits; URAT procedures and VHDL simulation; ASK modulation and demodulation process and VHDL simulation; FSK modulation and demodulation process and VHDL simulation; PSK modulation and demodulation process and VHDL simulation; MASK modulation procedures and VHDL simulation; MFSK modulation procedures and VHDL simulation; MPSK modulation and demodulation process and VHDL simulation; Base-band code gene
Platform: | Size: 1278976 | Author: 高 | Hits:

[VHDL-FPGA-Verilog] URAT_VHDL

Description: FPGA采用模块工程文件QUARTUS II工程、ADC0809、电机控制PWM、LCD12864显示控制、UART_VHDL-FPGA module QUARTUS II project engineering documents, ADC0809, motor control PWM, LCD12864 display control, UART_VHDL
Platform: | Size: 238592 | Author: wangzhaohui | Hits:

[VHDL-FPGA-Verilog] FPGA-URAT

Description: FPGA与PC串口自动收发程序,verilog源程序-FPGA and the PC serial port automatically sending and receiving process, verilog source code
Platform: | Size: 3072 | Author: niuqs | Hits:

[VHDL-FPGA-Verilog] FPGA-design-and-development-examples

Description: < FPGA数字电子系统设计与开发实例导航>>的实例代码，包含I2C，URAT，USB，CAN等等。-< <FPGA数字电子系统设计与开发实例导航> > Example code, including I2C, URAT, USB, CAN, and so on.
Platform: | Size: 1526784 | Author: jack | Hits:

[VHDL-FPGA-Verilog] 11122604338152

Description: 用FPGA驱动LCD显示的VHDL程序，URAT VHDL程序与仿真-Driven LCD display with FPGA VHDL program
Platform: | Size: 5120 | Author: 陈琳 | Hits:

[VHDL-FPGA-Verilog] URAT

Description: 在ISE环境下，用VHDL语言实现RS232串口设计，实现串口通信。通过串口调试工具向 0000000UART发送16进制数，FPGA将UART接收到的串行数据转换为并行数据，并在8个 LED灯上输出显示；同时，并行数据又被重新转换为串行数据，重新送给RS-232接口，并在串口调试工具上再次显示，SW0为复位键。比如：串口调试工具发送两位16进制数，然后能在LED上显示，并且重新在串口调试工具上显示。串口调试工具设置：波特率设为9600，默认奇校验。-In the ISE environment, using VHDL language RS232 serial port design, serial communication. Through the serial debugging tool to 0000000UART Send a hexadecimal number, FPGA serial data received by the UART converted to parallel data, and 8 LED lights on the output display the same time, parallel data has been re-converted to serial data, re-sent to the RS-232 interface, and in Serial debugging tools on the show again, SW0 for the reset button. For example: serial debugging tool to send two 16 hexadecimal number, and then can be displayed on the LED, and re-debugging in the serial port With a display. Serial debugging tool settings: baud rate is set to 9600, the default odd parity.
Platform: | Size: 403456 | Author: panda | Hits:

[Other] FPAG UART Verilog

Description: FPGA实现URAT，实现异步串口收发控制(FPGA implements URAT to realize asynchronous serial port and transceiver control)
Platform: | Size: 2048 | Author: zj剑影 | Hits:

Category

Source Code

Web/Internet

Develop Tools

Document

Other

Search in results

OS

Platform

Language

File Type

Search list