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[Other resource] pinlvji

Description: 基于FPGA的数字频率计，超大范围测量，误差非常之小，内含详细程序-FPGA-based digital frequency meter super scope of measurement, the error is very small, containing detailed procedures
Platform: | Size: 45436 | Author: 刘嵘 | Hits:

[VHDL-FPGA-Verilog] pinlvji

Description: 基于FPGA的数字频率计，超大范围测量，误差非常之小，内含详细程序-FPGA-based digital frequency meter super scope of measurement, the error is very small, containing detailed procedures
Platform: | Size: 45056 | Author: 刘嵘 | Hits:

[VHDL-FPGA-Verilog] Freq_counter

Description: 本代码介绍了使用VHDL开发FPGA的一般流程，最终采用了一种基于FPGA的数字频率的实现方法。该设计采用硬件描述语言VHDL，在软件开发平台ISE上完成，可以在较高速时钟频率（100MHz）下正常工作。该设计的频率计能准确的测量频率在1Hz到100MHz之间的信号。使用ModelSim仿真软件对VHDL程序做了仿真，并完成了综合布局布线，最终下载到芯片Spartan-II上取得良好测试效果。-the code on the FPGA using VHDL development of the general process, finally adopted a FPGA-based digital frequency method. The design using VHDL hardware description language, the software development platform ISE completed, the higher speed clock frequency (100MHz) under normal work. The design of the frequency meter can be accurately measured in a frequency of 100MHz between Hz signal. Use ModelSim VHDL simulation software to do the simulation process, and completed a comprehensive layout cabling, downloaded to the final chip Spartan-II made good on the test results.
Platform: | Size: 515072 | Author: 许的开 | Hits:

[VHDL-FPGA-Verilog] FR

Description: 基于FPGA的数字频率计的设计，可测量从1hz到10000hz，误差在1hz以内，是EDA课程学习很好的实例。-FPGA-based digital frequency meter design, measurable from 1Hz to 10000hz, error within 1Hz, EDA is a good example of the curriculum.
Platform: | Size: 1024 | Author: 彭得 | Hits:

[VHDL-FPGA-Verilog] frequence

Description: 基于FPGA设计的数字频率计，用VHDL写的代码。。。。有6各模块-FPGA-based design of digital frequency meter, use VHDL to write code. . . . Each module has 6
Platform: | Size: 2048 | Author: 张新福 | Hits:

[VHDL-FPGA-Verilog] teach10

Description: 8位十进制数字频率计 测量频率范围在1HZ—1MHZ之间-FPGA-based digital frequency meter super scope of measurement, the error is very small, containing detailed procedures
Platform: | Size: 12288 | Author: few | Hits:

[VHDL-FPGA-Verilog] FPGA-baseddesignofdigitalrequencymeter

Description: 基于FPGA数字频率计的实现，文中有所有的源代码，仅供参考。-FPGA-based realization of the digital frequency meter, text in all the source code, for reference purposes only.
Platform: | Size: 10240 | Author: helinglin | Hits:

[VHDL-FPGA-Verilog] FPGA

Description: 基于FPGA的数字频率计的设计11利用VHDL 硬件描述语言设计,并在EDA(电子设计自动化) 工具的帮助下,用大规模可编程逻辑器件(FPGA/ CPLD) 实现数字频率计的设计原理及相关程序-FPGA-based design of digital frequency meter 11, the use of VHDL hardware description language design, and EDA (electronic design automation) tools with the help of large-scale programmable logic devices used (FPGA/CPLD) digital frequency meter and the design principle related procedures
Platform: | Size: 665600 | Author: 董晨晨 | Hits:

[VHDL-FPGA-Verilog] aa

Description: 基于FPGA的数字频率计-FPGA-based digital frequency meter
Platform: | Size: 78848 | Author: 黄濡 | Hits:

[VHDL-FPGA-Verilog] shuzipinluji

Description: 基于fpga的数字频率计的vhdl设计源码-Fpga-based digital frequency meter vhdl design source
Platform: | Size: 2048 | Author: le | Hits:

[VHDL-FPGA-Verilog] counter

Description: 本文介绍了基于FPGA的数字频率计的设计方法，设计采用硬件描述语言Verilog ，在软件开发平台ISE上完成，可以在较高速时钟频率（48MHz）下正常工作。该数字频率计采用测频的方法，能准确的测量频率在10Hz到100MHz之间的信号。-This article describes the FPGA-based digital frequency meter design method using hardware description language Verilog, ISE on the complete software development platform, can be compared with high-speed clock frequency (48MHz) to work properly. The digital frequency meter using frequency measurement method, can accurately measure the frequency of the signal between 10Hz to 100MHz.
Platform: | Size: 1880064 | Author: PengJ | Hits:

[VHDL-FPGA-Verilog] Frequency-counter

Description: 基于FPGA的数字频率计：1. 测量1Hz～1GHz方波的频率，精度为十分位。 2. 档位自动调整，分为1Hz~999.9Hz,1KHz~999.9KHz,1MHz~999.9MHz三个档位。 3. 实现16位的除法器，进行频率的计算，并以ASIIC码输出测量的数据。 -FPGA-based digital frequency meter: 1. Measurement 1Hz ~ 1GHz square wave frequency, accuracy decile. (2) automatically adjusts the stalls, divided into 1Hz ~ 999.9Hz, 1KHz ~ 999.9KHz, 1MHz ~ 999.9MHz three stalls. 3 for 16-bit divider, the frequency calculations, and ASIIC code output measured data.
Platform: | Size: 133120 | Author: 曾 | Hits:

[VHDL-FPGA-Verilog] fpga--pinlvji

Description: 基于fpga的数字频率计，才用等精度原理设计，编程用的是VHDL语言-Fpga-based digital frequency meter, only with the accuracy of the principle of design, programming with VHDL language
Platform: | Size: 246784 | Author: dongsir | Hits:

[Software Engineering] FPGA-based-frequency-counter

Description: 文章主要介绍了使用VHDL实现数字频率计的功能，其中包含了各部件的VHDL语言描述，仿真和大致硬件框图，对于初学EDA者大有帮助。-The article introduces the VHDL realization of the functionality of the digital frequency meter, which contains the hardware block diagram of the various components of the VHDL language description, simulation and approximate, and is a great help for beginners EDA.
Platform: | Size: 777216 | Author: 金刚 | Hits:

[VHDL-FPGA-Verilog] FPGA

Description: 基于FPGA的数字频率计,实现频率测量，测量范围从1hz到10m-FPGA-based digital frequency meter, to achieve frequency measurement, measuring range from 1hz to 10m
Platform: | Size: 46080 | Author: 郑勇勇 | Hits:

[VHDL-FPGA-Verilog] zs

Description: 基于fpga的数字频率计，verilog编写，可修改闸门宽度0.1s/1s/10s，可测频率1hz~1mhz，包含整个工程，内部分频模块为了仿真方便改小了，后面注释为50mhz晶振下的分频值，可根据需要自行修改-Fpga-based digital frequency meter, verilog prepared to modify the gate width 0.1s/1s/10s, measurable frequency 1hz ~ 1mhz, contains the entire project, the frequency of some modules in order to facilitate the simulation piecemeal, behind the notes for the 50mhz crystal divider value can be modified as needed
Platform: | Size: 894976 | Author: 郎亚洲 | Hits:

[VHDL-FPGA-Verilog] src

Description: 基于Xilinx FPGA的数字频率计，包括测频测周期测脉宽测占空比等-Xilinx FPGA-based digital frequency meter, including frequency measurement measuring duty cycle pulse testing, etc.
Platform: | Size: 13312 | Author: 黄伟 | Hits:

[VHDL-FPGA-Verilog] Frequency_8bit

Description: 基于FPGA的8位数字频率计，经过本人验证，误差很小，结果通过数码管显示（完整的工程）-8 FPGA-based digital frequency meter, after I verified, the error is very small, the results through the digital display (complete works)
Platform: | Size: 865280 | Author: 曾宪深 | Hits:

[VHDL-FPGA-Verilog] FPGA

Description: 基于FPGA的数字频率计的课程设计，附完整代码。-FPGA-based digital frequency meter course design, with complete code.
Platform: | Size: 230400 | Author: 姚华 | Hits:

[VHDL-FPGA-Verilog] FPGA-high-precision-frequency-meter

Description: 基于FPGA的高精度频率计设计实验 展示数字存储示波器基本工作原理。 展示硬件测频和测周的基本原理。 在现有综合实践平台上开发DSO硬件频率计模块的方案及流程。 结合数据采集、存储和触发模块的FPGA代码。 FPGA代码完善DSO的频率计模块，实现高精度测频和测周功能。-FPGA-based high-precision frequency meter design experiments       Demonstrate the basic working principle of digital storage oscilloscope.       Demonstrate the basic principles of frequency measurement and test hardware week. Developed on an existing platform integrated practice DSO hardware frequency counter module programs and processes. Combined with data collection, storage and trigger module FPGA code. FPGA code to improve DSO frequency meter module, high-precision frequency measurement and measurement capabilities week.
Platform: | Size: 14547968 | Author: liu | Hits:
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