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[VHDL-FPGA-Verilog] I2c Core IP 核

Description:

可在SOPC中运行的IP核，经过系统验证


Platform: | Size: 193086 | Author: waving719 | Hits:

[source in ebook] 基于I2C的EEPROM的读写IP 核

Description: 基于I2C的EEPROM的读写IP 核
Platform: | Size: 5264 | Author: 030601201 | Hits:

[VHDL-FPGA-Verilog] I2C_IPcore_VHDL

Description: 这是一个I2C串行数据通信协议以VHDL硬件描述语言实现的IP核，可直接编译运行-I2C serial data communication protocol to VHDL hardware description language of the IP core can be directly translated Operation
Platform: | Size: 6144 | Author: 陈州徽 | Hits:

[VHDL-FPGA-Verilog] RD1006--I2C

Description: RD1006--I2C与存储器的IP 代码及说明文档，lattice提供，I2C Controller for Serial EEPROMs 源代码可用，并且包含tb文件-RD1006-- I2C and memory IP code and documentation. Lattice offer I2C Controller for Serial EEPROMs source code available, and document contains tb-
Platform: | Size: 205824 | Author: 刘超 | Hits:

[VHDL-FPGA-Verilog] i2c_7111_7128

Description: vhdl,用i2c控制philips的7111和7128-vhdl, and the i2c control philips 7111 and 7128
Platform: | Size: 8192 | Author: kevin | Hits:

[Embeded-SCM Develop] sd_audio_aic23

Description: SD卡和AIC23数字音频输出实验, FreeDev Audio Dsp Board采用了TI公司的TVL320AIC23 1、控制接口使用I2C，Quartus中将CS置低（器件地址0011010）。 2、数字音频接口使用了组件FreeDev_aic23,有三种测试和应用 模式，中断结合DMA方式能在NIOS II中采集和发送数据。中断信号 产生于模块中FIFO缓冲区的半满信号，读取数据端口自动清除中断 请求信号。 3、I2C IP 和FreeDev_aic23 IP分别在Quartus 工程目录中 4、SD卡读写通过SD_DAT0、SD_CLK、SD_CMD三个PIO信号线用软件 控制时序。 5、该范例读SD卡数据，通过DMA将Buffer数据送到FreeDev_aic23的 FIFO中实现数据播放。 6、SD卡中的数据必须是以48K*16bit保存的采样数据。数据可以通过SD读卡器写入。
Platform: | Size: 13312 | Author: HuFengzhang | Hits:

[Embeded-SCM Develop] i2c_IP

Description: altera 的i2c ip核，可直接调用 在quartus中把库指向文件位置就可-altera the i2c ip nuclear, can be directly called in the Quartus point in the database file location can be
Platform: | Size: 7168 | Author: 李涛 | Hits:

[MPI] i2c.tar

Description: i2c总线控制器ipcore，包含testbench-i2c bus controller ipcore, contains Testbench
Platform: | Size: 643072 | Author: 吴飞 | Hits:

[VHDL-FPGA-Verilog] i2c_p_altera

Description: altera i2c slave ip核verilog 编写-altera i2c slave ip to prepare nuclear Verilog
Platform: | Size: 1583104 | Author: 1984taozi | Hits:

[MPI] I2C

Description: I2C总线的verilog 程序，非常有用，已经经过验证。-Verilog I2C bus procedures, very useful, has been verified.
Platform: | Size: 70656 | Author: LLT | Hits:

[Embeded-SCM Develop] i2c_p

Description: I2C IP，可以直接用，有相关规范文档说明-I2C IP, can be directly used, have the relevant normative document explains
Platform: | Size: 2207744 | Author: pantree | Hits:

[VHDL-FPGA-Verilog] I2C_test

Description: FPGA EP2C5Q288C8 I2C 原码,测试OK 打开即用.-FPGA EP2C5Q288C8 I2C original code, test that is used to open OK.
Platform: | Size: 831488 | Author: kenychen | Hits:

[Other] I2C

Description: 详细描述了I2C的技术规范 版本号为2.1 是采用VHDL编写I2C的IP核的一本不错的参考资料-A detailed description of the I2C specification version 2.1 is the use of VHDL for the preparation of the IP core I2C a good reference
Platform: | Size: 283648 | Author: zyq | Hits:

[VHDL-FPGA-Verilog] I2C_IP_core

Description: I2C IP CORE 及开发文档, 网上搜集-I2C IP CORE and the development of documentation, on-line collection of
Platform: | Size: 452608 | Author: 大熊猫 | Hits:

[VC/MFC] altera_avalon_i2c

Description: i2c IP核 i2c.master i2c.mater.v-i2c IP core
Platform: | Size: 181248 | Author: zhengzhiqiang | Hits:

[Other] I2C

Description: IIC通信协议IP核，描述IIC协议在FPGA上的实现-IIC communications protocol IP core
Platform: | Size: 448512 | Author: shigengxin | Hits:

[VHDL-FPGA-Verilog] i2c_master_slave_core

Description: I2C master/slave IP core
Platform: | Size: 2180096 | Author: zhanglh | Hits:

[VHDL-FPGA-Verilog] altera_avalon_i2c_V90

Description: I2C IP for Quartus V9.0, can used in SOPC builder.
Platform: | Size: 12288 | Author: homeuser | Hits:

[Other] i2c

Description: i2c master controller, free ip
Platform: | Size: 11264 | Author: lai | Hits:

[VHDL-FPGA-Verilog] i2c

Description: 这是基于altera avalon-MM总线的I2C IP核。利用VHDL语言编写。(This is an I2C IP core based on the altera avalon-MM bus. Using VHDL language.)
Platform: | Size: 82944 | Author: 打采萨 | Hits:
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