Description: 一般网站上都有i2c master模块的代码,但很少有slave的代码,这里就是slave的代码,非常有用.-general website have i2c master module of code, but very few slave code, This is the slave code, very useful. Platform: |
Size: 2048 |
Author:hxwf801 |
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Description: I2C 主从机控制工程完整,
利用周立功ARM2100板子，实现两块机子的I2C数据通信，具体为一板子按鍵控制另一板板子的LED-I2C master-slave control engineering integrity, use weeks Ligong ARM2100 board, two loom realize the I2C data communications, specifically for one board to another board buttons to control the LED board Platform: |
Size: 198656 |
Author:周东永 |
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Description: The Inter IC bus or I2C bus is a simple bidirectional two wire bus designed primarily for general control
and data transfer communication between ICs.
Some of the features of the I2C bus are:
• Two signal lines, a serial data line (SDA) and a serial clock line (SCL), and ground are required. A
12V supply line (500mA max.) for powering the peripherals often may be present.
• Each device connected to the bus is software addressable by a unique address and simple
master/ slave relationships exist at all times masters can operate as master-transmitters or as
master-receivers.
• The I2C bus is a true multi-master bus including collision detection and arbitration to prevent data
corruption if two or more masters simultaneously initiate data transfer systems.
• Serial, 8-bit oriented, bidirectional data transfers can be made at up to 100 KBit/s in the standard
mode or up to 400 KBit/s in the fast mode.
Platform: |
Size: 788480 |
Author:lu |
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Description: iic总线控制器VHDL实现
-- VHDL Source Files:
i2c.vhd -- top level file
i2c_control.vhd -- control function for the I2C master/slave
shift.vhd -- shift register
uc_interface.vhd -- uC interface function for an 8-bit 68000-like uC
upcnt4.vhd -- 4-bit up counter
i2c_timesim.vhd -- post-route I2C simulation netlist
-IIC bus controller VHDL realize- VHDL Source Files: i2c.vhd- top level file i2c_control.vhd- control function for the I2C master/slave shift.vhd- shift register uc_interface.vhd- uC interface function for an 8-bit 68000-like uC upcnt4.vhd- 4-bit up counter i2c_timesim.vhd- post-route I2C simulation netlist Platform: |
Size: 889856 |
Author:benny |
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Description: 该程序是pic单片机程序，里面含有主从单片机i2c通讯程序。开发环境就是pic单片机的那个专用开发环境。单片机c程序，仅供大家参考。-The program is pic Singlechip procedure, which contains a single-chip i2c master-slave communication procedures. Development environment that is dedicated pic SCM development environment. Singlechip c procedures for your reference. Platform: |
Size: 211968 |
Author:刘柱 |
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Description: 实现8位c51单片机的主机和从机的i2c通讯的源代码-C51 achieve 8-bit microcontroller i2c master and slave of the source code of communication Platform: |
Size: 1024 |
Author:曹 |
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Description: 用verilog 实现的 iic 总线编程，包括master，和slave的编程，很详细的iic总线编程-Iic-bus implemented using verilog programming, including the master, and slave programming, a very detailed iic-bus programming Platform: |
Size: 2181120 |
Author:郭天然 |
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Description: This I2C library contains the following functionalities:
- master/slave communication
- timeout in case of bus failure
- self recovery after timeout
- possibility to write one of 32 bytes slave registers
In the archive you can find the hardware schematic, some photos of the working platform, the required libraries and an working example. In the example the master MCU writes 2 bytes to the slave MCU which then sums them together. Then the MCU read the result and print it on the LCD. In case of I2C failure, either a TIMEOUT or FAILURE message will be printed on the LCD depending of which line was break. The MCU uses for both master and slave was PIC16F887. It use internal clock at 8Mhz so no cristal is required. Platform: |
Size: 6281216 |
Author:A.D
|
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