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Description: 这是一个二维 8*8块的离散余弦变换(DCT)以及反变换(IDCT)算法,采用VHDL实现
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Size: 10711 |
Author: liujl |
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Description: 这是用VHDL语言(硬件描述语言)写的一个二维
8*8块的离散余弦变换(DCT)以及反变换(IDCT).全同步设计,低门数.可以用于多媒体及打印应用领域.-VHDL (hardware description language) wrote a two-dimensional 8* 8 discrete cosine transform (D CT) and the anti-transform (IDCT). fully synchronous design, low gate count. can be used for multimedia and print applications.
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Size: 32768 |
Author: citybus |
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Description: IDCT-M is a medium speed 1D IDCT core
-- it can accept a continous stream of 12-bit input words at a rate of
-- 1 bit/ck cycle, operating at 50MHz speed, it can process MP@ML MPEG video
-- the core is 100% synthesizable-IDCT-M is a medium speed 1D IDCT core-- it ca n accept a continuous stream of 12-bit input word 's at a rate of-- 1 bit/ck cycle, operating at 50MHz speed, it can process MP @ ML MPEG video-- the core is 100 % synthesizable
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Size: 10240 |
Author: 陈朋 |
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Description: 这是一个二维 8*8块的离散余弦变换(DCT)以及反变换(IDCT)算法,采用VHDL实现-This is a two-dimensional 8* 8 discrete cosine transform (DCT) and inverse transform (IDCT) algorithms using VHDL realize
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Size: 10240 |
Author: liujl |
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Description: 一种改进的一维DCT方案设计与实现,采用VHDL硬件语言描述,DCT以及IDCT-An improved one-dimensional program design and realization of DCT using VHDL hardware description language, DCT and IDCT
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Size: 313344 |
Author: 小金 |
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Description: 一种改进的一维DCT方案设计与实现,采用VHDL实现,DCT以及IDCT-A one-dimensional DCT to improve program design and implementation using VHDL realize, DCT and IDCT
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Size: 129024 |
Author: 小金 |
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Description: aan.cpp - 2d idct using aan algorithm ANN 算法-aan.cpp- 2d idct using aan algorithm ANN algorithm
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Size: 11264 |
Author: |
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Description: this si Arithmetic core,it contains FreeDCT-L and FreeDCT-M.FreeDCT-L is a low power architecture 1-Dimensional 8-point DCT/IDCT core.FreeDCT-M is a moderate speed 1-Dimensional IDCT core
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Size: 866304 |
Author: lilei |
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Description: 2维DCt源码,可以实现8乘8点数据的2维DCT变换
-2-D DCT-source, you can realize 8 x 8 data 2-D DCT transform
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Size: 5120 |
Author: jz |
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Description: 8x8 iDCT verilog code
一次輸入八個點-8x8 iDCT verilog code once the importation of eight points
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Size: 8303616 |
Author: Emuil |
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Description: 离散余弦变换及反离散余弦变换的HDL代码及测试文件。包括VHDL及Verilog版本。可用途JPEG及MEPG压缩算法。-Discrete cosine transform and inverse discrete cosine transform of the HDL code and test files. Including VHDL and Verilog versions. And MEPG can use JPEG compression algorithm.
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Size: 29696 |
Author: caesar |
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Description: xilinx 基于查找表方法实现的IDCT的verilog源码-Xilinx LUT-based method to achieve the IDCT of the Verilog source code
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Size: 8192 |
Author: lee |
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Description: Project 2D DCT core - specifications and codes-Project 2D DCT core- specifications and codes
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Size: 494592 |
Author: student |
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Description: IDCT - xlinix design in vhdl-IDCT- xlinix design in vhdl
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Size: 29696 |
Author: asia |
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Description: This is a matrixl 8 * 8 discrete cosine transform (DCT) and inverse transform (IDCT) algorithms using VHDL realiz-This is a matrixl 8* 8 discrete cosine transform (DCT) and inverse transform (IDCT) algorithms using VHDL realiz
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Size: 1024 |
Author: helllano |
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Description: 2-D的DCT/IDCT在軟硬體上的verilog code-dct/idct source code for soc
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Size: 10801152 |
Author: 陳伯綸 |
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Description: it is verilog code for two dimentional dct
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Size: 18432 |
Author: suhu |
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Description: dct and idct vhdl code
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Size: 72704 |
Author: suhu |
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Description: verilog code for DCT and IDCT (JPEG)
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Size: 63488 |
Author: Dang Tien Dat |
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Description: The
elements come from the necessity of creating generic
modules, in the verification phase, for this widely used
protocol. These primitives are presented as a not
compiled library written in SystemC where interfaces
are the core of the library. The definition of interfaces
instead of generic modules let the user construct
custom modules improving the resources spent during
the verification phase as well as easily adapting his
own modules to the AMBA 3 AXI protocol. As
validation scenario, results obtained for an AXI bus
connecting IDCT and other processing resources for
MPEG4 video decoding are presented.
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Size: 41984 |
Author: Paul Stephen |
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