Search - LMS verilog

Search - LMS verilog - List

[VHDL-FPGA-Verilog] lms verilog DL : 1: lms veriog程序，不错的代码
Update : 2012-01-11 Size : 946byte Publisher : pofet@sina.com
[SCM] dct_source_code DL : 0: DCT source code,verilog代码。有兴趣的可以参考下。-DCT source code, verilog code. Interested can refer to the next.
Update : 2025-02-17 Size : 26kb Publisher : 小步
[VHDL-FPGA-Verilog] 05805 DL : 0: 无线通信fpga设计matlab、verilog代码
Update : 2025-02-17 Size : 201kb Publisher : zhangxi
[VHDL-FPGA-Verilog] fir6dlms DL : 1: lms的verilog代码，我找了好久在才找的的，好东西，大家一起学习-LMS of the Verilog code, I am looking for a long time before looking at the good things we can work together to learn
Update : 2025-02-17 Size : 1kb Publisher : 李允
[VHDL-FPGA-Verilog] ante DL : 0: 智能天线自适应LMS算法，假设具有4个天线阵元。-Smart antenna adaptive LMS algorithm, the assumption that with four million antenna array.
Update : 2025-02-17 Size : 4kb Publisher : 黄虎
[VHDL-FPGA-Verilog] fir_lms DL : 0: 基于FPGA的自适应滤波器的实现。采用Verilog编程，2阶滤波器。-FPGA-based realization of the adaptive filter. Using Verilog programming, 2-order filter.
Update : 2025-02-17 Size : 12kb Publisher : 田文军
[VHDL-FPGA-Verilog] lms DL : 0: 一个不错的关于lms算法的verilog代码，算然只有两级，但是对了解lms用HDL描述有很好的理解作用。希望对大家有用~-A good lms algorithm on the verilog code, development environment, I can not find, even if the vhdl it! We hope to be useful
Update : 2025-02-17 Size : 1kb Publisher : onion
[VHDL-FPGA-Verilog] fir_lms DL : 0: 一个不错的关于lms算法的verilog代码，算然只有两级，但是对了解lms用HDL描述有很好的理解作用。希望对大家有用~-A good lms algorithm on the verilog code, development environment, I can not find, even if the vhdl it! We hope to be useful
Update : 2025-02-17 Size : 1kb Publisher : onion
[VHDL-FPGA-Verilog] lms DL : 0: verilog 关于LMS均衡器的一些很有用的外文资料需要的下免费-verilogverilogverilogverilogverilogverilogverilog
Update : 2025-02-17 Size : 5.44mb Publisher : 不懂什么
[VHDL-FPGA-Verilog] LMS_filter DL : 0: verilog HDL 写的LMS滤波器-LMS filter using verilog HDL language
Update : 2025-02-17 Size : 342kb Publisher : rayax
[VHDL-FPGA-Verilog] HDLImplementationoftheVariableStepSize DL : 0: proposes a Verilog implementation of the Normalized Least Mean Square (NLMS) adaptive algorithm, having a variable step size. The envisaged application is the identification of an unknown system. First the convergence of derived LMS algorithms was analyzed in a Simulink application.
Update : 2025-02-17 Size : 218kb Publisher : 陳柏宇
[VHDL-FPGA-Verilog] lms DL : 0: verilog编写的lms算法模块，简单易用-lms module using verilog.It s simple.
Update : 2025-02-17 Size : 1kb Publisher : 邓小伟
[VHDL-FPGA-Verilog] fir_lms DL : 0: verilog语言编写LMS（最小均方误差）自适应滤波器。-verilog language LMS (least mean square error) adaptive filter.
Update : 2025-02-17 Size : 1kb Publisher : 刘俊斌
[VHDL-FPGA-Verilog] fir_lms DL : 0: finite impulse response LMS algorithm verilog code
Update : 2025-02-17 Size : 36kb Publisher : zcos123
[VHDL-FPGA-Verilog] lms DL : 0: LMS自适应滤波器,verilog语言实现，能实现有符号数的运算-LMS filer
Update : 2025-02-17 Size : 1kb Publisher : guanwen
[VHDL-FPGA-Verilog] lms DL : 1: 文件中为lms算法的ise工程，其中包含了lms算法的fpga实现的verilog程序以及testbench，很好的在FPGA上实现了lms算法，还有一些调试程序的总结-Ise project file for lms algorithm, which contains the lms algorithm fpga verilog program to achieve and testbench good lms algorithm implemented on FPGA debugger summary
Update : 2025-02-17 Size : 2.68mb Publisher : 黄远望
[VHDL-FPGA-Verilog] LMS DL : 0: 用verilog编写的lms算法。可实现自适应滤波功能-Lms algorithm written in verilog. Adaptive filtering can be achieved
Update : 2025-02-17 Size : 2kb Publisher : he
[Other] lms DL : 0: lms fpga 设计，verilog 语言编写(lms fpga designed with verilog)
Update : 2025-02-17 Size : 13kb Publisher : ouyxj
[VHDL-FPGA-Verilog] LMS DL : 0: least mean square algo implemented on verilog
Update : 2025-02-17 Size : 185kb Publisher : addy007
[matlab] LMS filter DL : 0: lms filter on verilog filter and synthesizable on xilinx
Update : 2025-02-17 Size : 187kb Publisher : addy007

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