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[WEB Code] report3_基于LUT的逆半调方法研究

Description: 基于LUT的逆半调方法研究-LUT based on the inverse half-Study
Platform: | Size: 33425 | Author: 郑世华 | Hits:

[Special Effects] LUT.tar

Description: LUT图像处理算法的源代码，包括了c和matlab版本
Platform: | Size: 2020 | Author: 孙不显 | Hits:

[Documents] report3_基于LUT的逆半调方法研究

Description: 基于LUT的逆半调方法研究-LUT based on the inverse half-Study
Platform: | Size: 32768 | Author: 郑世华 | Hits:

[VHDL-FPGA-Verilog] ji

Description: 这是正玹实现代码,通过LUT来实现的!!!比其他要简单的多!还有方波,三角波的不同的VHDL程序实现. -This is the realization of code are Hsuan Lee, LUT to achieve! ! ! Other than the more simple! There square, triangular wave of the different VHDL program.
Platform: | Size: 16384 | Author: jiayu | Hits:

[Program doc] DDS

Description: FPGA中实现基于查找表方式（LUT）的DDS实现，可用在数字下变频和COSTAS锁相环中，Verilog编写，本人已经调通-In FPGA-based lookup table approach (LUT) to achieve the DDS can be used in the digital down-conversion and COSTAS PLL, Verilog prepared, I have transferred Qualcomm
Platform: | Size: 148480 | Author: | Hits:

[matlab] LUT

Description: 一个查找表的程序，使用了matlab和C语言混合编程实现，提高查找效率-A look-up table of procedures, the use of matlab and C mixed-language programming, improve search efficiency
Platform: | Size: 4096 | Author: ZhangGeng | Hits:

[ELanguage] LUTFPGA

Description: 一种LUT函数运算单元的FPGA实现方法，希望能够帮助大家-A LUT function FPGA computing modules to achieve, and I hope that can help you
Platform: | Size: 60416 | Author: 张治邦 | Hits:

[Graph program] xapp208

Description: xilinx 基于查找表方法实现的IDCT的verilog源码-Xilinx LUT-based method to achieve the IDCT of the Verilog source code
Platform: | Size: 8192 | Author: lee | Hits:

[VHDL-FPGA-Verilog] HwLog10

Description: 用verilog写的，基于查表法实现的LOG10运算器，在Altera FPGA中应用。-It is a verilog design of LOG10 calculation unit, which is based on LUT arithmatic. And it is applicated in Altera FPGA.
Platform: | Size: 13312 | Author: vincent | Hits:

[VHDL-FPGA-Verilog] DPD_LUT

Description: 一种基于LUT的预失真方法。其中的一部分，有参考价值。-one method of DPD based on LUT
Platform: | Size: 2561024 | Author: 智慧川 | Hits:

[matlab] find_LUT_power_ranges

Description: 基于LUT的数字预失真MATLAB代码 -LUT digital predistortion
Platform: | Size: 1024 | Author: applo | Hits:

[VHDL-FPGA-Verilog] fullsine

Description: This a code for sine wave generation in modelsim. The code is written in verilog. An LUT has to be added to this program to work completely.-This is a code for sine wave generation in modelsim. The code is written in verilog. An LUT has to be added to this program to work completely.
Platform: | Size: 1024 | Author: Jithu | Hits:

[matlab] LUT

Description: the m file make the LUT for predistoriton system.
Platform: | Size: 14336 | Author: pouria | Hits:

[OpenCV] main

Description: 直方圖等化(Histogram Equalization)為一種使用統計方法的影像處理程式設計,它的功能為將統計直方圖的色彩分布平均的打散在直方圖裡,也就是說,讓一張圖的直方圖分布均勻化,同樣的也是使用到LUT(Look-up Table)的方法 而在設計直方圖等化不可或缺的就是需要先知道統計學的機率密度函數(Probability Density Function,PDF)以及累積分配函數(Cumlative Distribution Function,CDF)相關的基本概念,在這邊會簡單的說明機率密度函數及累積分配函數的概念還有直方圖等化的程式設計實作,而OpenCV也提供了直接使用直方圖等化的函式,cvEqualizeHist(),下面就簡單的製作直方圖等化的程式設計 -Histogram equalization (Histogram Equalization) for a use of statistical methods of image processing programming, its function as a statistical histogram of color distribution of the average scatter in the histogram, the words, let the distribution of a histogram graph homogenization, the same also use the LUT (Look-up Table) method In the design of histogram equalization is an essential need to know the statistical probability density function (Probability Density Function, PDF) and cumulative distribution function (Cumlative Distribution Function, CDF) related to the basic concepts, in the side would be a simple shows probability density function and cumulative distribution function, the concept of histogram equalization programs are designed to implement, while OpenCV also provides direct access to the histogram equalization function, cvEqualizeHist (), Here s the simple production of histogram equalization programming
Platform: | Size: 1024 | Author: nip | Hits:

[VHDL-FPGA-Verilog] sqrt_LUT8

Description: Square root calculation: S=N^2+d using LUT-Square root calculation: S=N^2+d using LUT
Platform: | Size: 3072 | Author: Alex Seghedin | Hits:

[VHDL-FPGA-Verilog] lut_core

Description: LUT core in VHDL program
Platform: | Size: 2048 | Author: xyz002 | Hits:

[VHDL-FPGA-Verilog] atan_lut

Description: atan LUT in VHDL program
Platform: | Size: 1024 | Author: xyz002 | Hits:

[matlab] MATLAB_LUT

Description: LUT table interpolation without/with divider
Platform: | Size: 1024 | Author: none | Hits:

[Other] Lut-based-adaboost-for-gender-classification

Description: Lut-based adaboost for gender classification
Platform: | Size: 544768 | Author: byeongjun jeong | Hits:

[VHDL-FPGA-Verilog] lut

Description: this is a programmed lut
Platform: | Size: 154624 | Author: Johnny vintéin | Hits:
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