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《数字设计和计算机体系结构》一书MIPS VHDL源码。
Update : 2008-10-13 Size : 4.63kb Publisher : guo

MIPS相关材料 及应用样例
Update : 2012-04-26 Size : 338.88kb Publisher : 13611868661@qq.

这是一个基于mips-I结构的处理器,32bit,冯诺依曼结构-This is based on a MIPS- I structure of the processor, 32bit, von Neumann structure
Update : 2025-02-17 Size : 217kb Publisher : tsm998

mips prcessor in Verilog and vhdl-mips prcessor in vhdl and Verilog
Update : 2025-02-17 Size : 7kb Publisher : 张六封

DL : 0
MIPS处理器VHDL代码,实现加法,减法乘除等运算,可综合,-MIPS processor VHDL code, realize adder, subtraction multiplication and division and other operations can be integrated,
Update : 2025-02-17 Size : 6kb Publisher : 陈丰

DL : 0
MIPS处理器的顶层VHDL代码,可综合,可仿真,属硬件描述语言,集成电路设计代码-MIPS processor top-level VHDL code can be integrated to simulation, a hardware description language, integrated circuit design code
Update : 2025-02-17 Size : 1kb Publisher : 陈丰

DL : 0
MIPS处理器的数据通道VHDL代码,可综合,可仿真,属硬件描述语言,集成电路设计代码-MIPS processor data channel VHDL code can be integrated to simulation, a hardware description language, integrated circuit design code
Update : 2025-02-17 Size : 1kb Publisher : 陈丰

这是一个MIPS架构的开发的CPU软核OR2000,比OR1200更高的版本,里面还有SOC程序,多次MPW流片成功-This is a MIPS architecture to develop the CPU soft-core OR2000, higher than OR1200 version, there is also SOC procedures, many times MPW silicon success
Update : 2025-02-17 Size : 100kb Publisher : liming

modelsim+dc开发的4级流水线结构的MIPS CPU,完成基本的逻辑运算和跳转。测试程序为希尔排序,结果正确。-modelsim+ dc development of four pipelined structure MIPS CPU, the completion of the basic logic operations and Jump. Test procedure for the Hill to sort the results correctly.
Update : 2025-02-17 Size : 300kb Publisher : 杨春

《数字设计和计算机体系结构》一书MIPS VHDL源码。
Update : 2025-02-17 Size : 4kb Publisher : guo


Update : 2025-02-17 Size : 709kb Publisher : stephen

组成原理大作业--基于MIPS的运算器设计,内附详细设计文档,包含设计文档和使用手册,主程序,测试程序,还有设计的框图等。实现了可以执行基本的MIPS有关运算器相关的指令共17条,用Verilog编写。-Composition Principle big operation- based on the MIPS computing design, containing a detailed design document, including design documentation and user manual, the main program, testing procedures, as well as the design of the diagram and so on. Can be implemented to achieve a basic computing device on the MIPS instruction were related to 17, prepared using Verilog.
Update : 2025-02-17 Size : 2.92mb Publisher : da

DL : 0
A small MIPS R2000 implementation in VHDL
Update : 2025-02-17 Size : 26kb Publisher : methy

MIPS CPU设计实例的完整文档,台湾一个大学生的MIPS CPU完整设计文档,内附设计代码。-a complete document of MIPS CPU design , a Taiwan university students complete MIPS CPU design document, containing the design code.
Update : 2025-02-17 Size : 897kb Publisher : 李皓

带分支预测的MIPS流水线的verilog原代码。 详细介绍了流水线的设计代码-Branch prediction with the MIPS pipeline verilog source code. Details of pipeline design code
Update : 2025-02-17 Size : 17kb Publisher : 张鹤

mips 32 implementation
Update : 2025-02-17 Size : 3.49mb Publisher : aladin6891

Quartus-Altera Nios... VHDl based, complete MIPS implementation, document, flowcharts plus code
Update : 2025-02-17 Size : 4.13mb Publisher : ak

MIPS处理器的组员大作业,可以直接运行,提交,环境是quartus-MIPS processor crew great job, you can run directly, the author, the environment is quartusII
Update : 2025-02-17 Size : 2.92mb Publisher : fan

在maxplus上实现了一个5级流水线的mips cpu,含cache-In maxplus to achieve a 5-stage pipeline of the mips cpu, with cache
Update : 2025-02-17 Size : 439kb Publisher : tong tong

MIPS VHDL Microprocessor without Interlocked Pipeline Stages
Update : 2025-02-17 Size : 111kb Publisher : white memory
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