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[Embeded-SCM Develop] nios

Description: ALTERA的NIOS处理器！文件直接可以打开直接选择器件重新编译！-Altera's NIOS processor! Documents can be opened directly choose devices directly recompile!
Platform: | Size: 667030 | Author: 林建加 | Hits:

[Embeded-SCM Develop] Cyclone1C20的Nios开发板完整原理图Protel格式

Description: Cyclone1C20的Nios开发板完整原理图Protel格式，很有参考价值 --The complete design of CycloneC20 s Nios development. It is in Protel format and is a valuable reference.
Platform: | Size: 78076 | Author: 张文 | Hits:

[Embeded-SCM Develop] nios

Description: ALTERA的NIOS处理器！文件直接可以打开直接选择器件重新编译！-Altera's NIOS processor! Documents can be opened directly choose devices directly recompile!
Platform: | Size: 666624 | Author: 林建加 | Hits:

[Embeded-SCM Develop] Cyclone1C20的Nios开发板完整原理图Protel格式

Description: Cyclone1C20的Nios开发板完整原理图Protel格式，很有参考价值 --The complete design of CycloneC20 s Nios development. It is in Protel format and is a valuable reference.
Platform: | Size: 77824 | Author: | Hits:

[Other] NIOStoSOPC

Description: 本书主要介绍Altera公司的软核CPU——nios和采用该CPU进行嵌入式系统设计的流程与方法。并以此为着眼点，介绍Altera的片上可编程系统SOPC的设计原理与实践技术，引领读者在低投入的情况下，较快地进入片上系统soc的殿堂。 -This book introduces the Altera s soft-core CPU- nios and the use of the CPU for embedded system design process and methods. As the focus on Altera s programmable system chip SOPC design principle and practice of technology, leading the reader in the case of low-input, fast access to system-on-chip soc hall.
Platform: | Size: 8742912 | Author: 阿康 | Hits:

[Other] NiosSystemDesigned_C

Description: 本书以Altera公司开发的NIOS嵌入式处理器软核为例，介绍了嵌入式处理器的组成原理和开发应用。介绍NIOS系统设计和c程序编程与调试。-book to Altera NIOS development of the soft-core embedded processor as an example. on the embedded processor's architecture and application development. NIOS introduced c system design and programming and debugging.
Platform: | Size: 7921664 | Author: 阿康 | Hits:

[Other resource] t6963_nios

Description: 液晶控制器t6963在软核处理器nios上的驱动程序-T6963 LCD controllers in the soft-core Nios processor s driver
Platform: | Size: 3072 | Author: asfdaf | Hits:

[Embeded-SCM Develop] SIN_fashengqi

Description: 2006altera大赛－基于软核Nios的宽谱正弦信号发生器设计：摘要：本设计运用了基于 Nios II 嵌入式处理器的 SOPC 技术。系统以 ALTERA公司的 Cyclone 系列 FPGA 为数字平台，将微处理器、总线、数字频率合成器、存储器和 I/O 接口等硬件设备集中在一片 FPGA 上，利用直接数字频率合成技术、数字调制技术实现所要求波形的产生，用 FPGA 中的 ROM 储存 DDS 所需的波形表，充分利用片上资源，提高了系统的精确度、稳定性和抗干扰性能。使用新的数字信号处理（DSP）技术，通过在 Nios 中软件编程解决 不同的调制方式的实现和选择。系统频率实现 1Hz～20MHz 可调，步进达到了1Hz；完成了调幅、调频、二进制 PSK、二进制 ASK、二进制 FSK 调制和扫频输出的功能。 -2006altera race-based soft-core Nios wide spectrum of sinusoidal signal generator design : Abstract : The use of design-based Nios II embedded processor SOPC technology. Altera Corporation system to the Cyclone FPGA series of digital platform, microprocessor, bus, Digital Frequency Synthesizer, memory and I/O interface hardware concentrated in an FPGA, the use of direct digital frequency synthesis technology and digital modulation waveforms required to achieve the rise, Using FPGA ROM storage of the DDS waveform table, and make full use of on-chip resources, improve the system's accuracy, stability and robustness. Use of new digital signal processing (DSP) technology, Nios through software programming to solve different ways of achieving modulation and choice. Realize the system freq
Platform: | Size: 407552 | Author: 刘斐 | Hits:

[Embeded-SCM Develop] hello_world_0

Description: 此源码是用altera公司的nios II IDE开发的，基于DE2核心板的SD卡播放wav格式音频文件的程序-This source is altera s nios II IDE development, based on the core DE2 board SD card playback wav format audio files
Platform: | Size: 144384 | Author: zeng xuan | Hits:

[Embeded-SCM Develop] hello_led_0

Description: 一个sd卡读写的源程序，这个程序是基于altera的嵌入式处理器nios的。不包含文件系统，代码简单明了，强烈推荐-A sd card reader of the source, this procedure is based on altera s Nios embedded processor. Does not contain a file system, the code is simple and clear, strongly recommend
Platform: | Size: 6144 | Author: 肖卫华 | Hits:

[Embeded-SCM Develop] Binary_VGA_Controller

Description: VGA的IP核，可直接用于nios II的应用里，在DE2板子直接使用-VGA s IP core, can be used directly in nios II applications, the direct use in the DE2 board
Platform: | Size: 79872 | Author: 沈克镇 | Hits:

[Embeded-SCM Develop] ISP1362

Description: ISP1362的IP核，可直接用于nios II的应用里，在DE2板子直接使用-ISP1362 s IP core, can be used directly in nios II applications, the direct use in the DE2 board
Platform: | Size: 18432 | Author: 沈克镇 | Hits:

[ARM-PowerPC-ColdFire-MIPS] Altera

Description: 利用Nios Ⅱ软核处理器，以Altera公司的UP3开发板为硬件平台，以Quartus II、Quartus ID为软件开发平台，设计一个电子钟，实现下列系统功能： （1）在液晶屏上显示时间、日期、状态提示； （2）利用4个按键对时间（时分秒）、日期（年月日）进行设置； （3）利用一个LED灯指示当前设置状态；-The use of soft-core processor, Nios Ⅱ to Altera s UP3 development board as the hardware platform to Quartus II, Quartus ID for software development platform, design a clock
Platform: | Size: 6460416 | Author: Emma | Hits:

[OS Develop] sys_nios_verilog

Description: Verilog语言，nios最小系统，在DE2板上测试成功-Verilog language, nios minimum system, tested successfully in the DE2 board
Platform: | Size: 6640640 | Author: lf | Hits:

[Other] NiosII_Software_Developers_Handbook

Description: Nios II Software Developer’s Handbook-Nios II Software Developer s Handbook
Platform: | Size: 2072576 | Author: yingjiang | Hits:

[VHDL-FPGA-Verilog] tut_DE2_sdram_vhdl

Description: This tutorial explains how the SDRAM chip on ltera’s DE2 Development and Education board can be used with a Nios II system implemented by using the Altera SOPC Builder.
Platform: | Size: 546816 | Author: *Roma* | Hits:

[Other] NIOS

Description: 北航的NIOSII教程！！第7章 Nios Ⅱ嵌入式处理器设计 7.1 Nios Ⅱ嵌入式处理器简介 7.2 Nios Ⅱ嵌入式处理器软、硬件开发流程 7.3 Nios Ⅱ嵌入式处理器系统的开发 7.4 Nios Ⅱ嵌入式处理器外围接口 7.5 HAL系统库 7.6 设计实例——电子钟 -Beihang' s NIOSII tutorial! ! Chapter 7 Nios Ⅱ embedded processor embedded processor design 7.1 Nios Ⅱ Introduction 7.2 Nios Ⅱ embedded processor hardware and software development processes 7.3 Nios Ⅱ embedded processor system development 7.4 Nios Ⅱ embedded processor Peripheral Interface 7.5 HAL System Library 7.6 Design Example- E-Clock
Platform: | Size: 2739200 | Author: 殷桃 | Hits:

[VHDL-FPGA-Verilog] Nios_II_SPI

Description: 本源码为Nios II的开发示例,主要演示Nios II的SPI总线设计。开发环境QuartusII。 本示例十分经典，对基于SOPC开发的FPGA初学者有很大帮助。-The source code for the Nios II development of an example, the main demonstration Nios II design of the SPI bus. Development environment QuartusII. This example is very classic, FPGA-based SOPC development of great help for beginners.
Platform: | Size: 16035840 | Author: huangshengqun | Hits:

[VHDL-FPGA-Verilog] Nios

Description: altera fpga的nios经典教材-altera fpga s classic textbook about nios
Platform: | Size: 3614720 | Author: bentley | Hits:

[Embeded-SCM Develop] NIOS-II常用函数详解

Description: Nios II系列软核处理器是Altera的第二代FPGA嵌入式处理器，其性能超过200DMIPS，。Altera的Stratix 、Stratix GX、 Stratix II和 Cyclone系列FPGA全面支持Nios II处理器，以后推出的FPGA器件也将支持Nios II。(The Nios II family of soft core processors is the second generation of Altera's FPGA embedded processor that provides support for Altera's Stratix, Stratix GX, Stratix II, and Cyclone FPGA families that exceed 200DMIPS in performance.)
Platform: | Size: 74752 | Author: 彩云之南7 | Hits:
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