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Description: 在fpga上关于nios开发版的测试文件,测试对象包括led,lcd,uart,内存,基本io等,对于检测硬件十分有用-they simply on the development of the nios version of the test document, including testing led, LCD, UART, memory, basic io, for the very useful hardware detection
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Size: 8192 |
Author: wp |
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Description: 基于nios软核处理器的FPGA嵌入式片上系统中的mp3算法-based soft core processor FPGA Embedded System-on the MP3 algorithm
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Size: 1024 |
Author: zhoushu |
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Description: 一个基于FPGA的串口程序,已经经过验证,对用FPGA做串口的朋友提供参考和借鉴!-an FPGA-based serial procedures have proven, right Serial do with FPGA reference for a friend and borrow!
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Size: 311296 |
Author: 舟舟 |
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Description: NIOS的CF卡应用,包括了软件和硬件,支持多个系列的PFGA-NIOS the CF card applications, including the hardware and software, to support a number of series PFGA
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Size: 1608704 |
Author: |
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Description: 2006altera大赛-基于软核Nios的宽谱正弦信号发生器设计:摘要:本设计运用了基于 Nios II 嵌入式处理器的 SOPC 技术。系统以 ALTERA公司的 Cyclone 系列 FPGA 为数字平台,将微处理器、总线、数字频率合成器、存储器和 I/O 接口等硬件设备集中在一片 FPGA 上,利用直接数字频率合成技术、数字调制技术实现所要求波形的产生,用 FPGA 中的 ROM 储存 DDS 所需的波形表,充分利用片上资源,提高了系统的精确度、稳定性和抗干扰性能。使用新的数字信号处理(DSP)技术,通过在 Nios 中软件编程解决
不同的调制方式的实现和选择。系统频率实现 1Hz~20MHz 可调,步进达到了1Hz;完成了调幅、调频、二进制 PSK、二进制 ASK、二进制 FSK 调制和扫频输出的功能。
-2006altera race-based soft-core Nios wide spectrum of sinusoidal signal generator design : Abstract : The use of design-based Nios II embedded processor SOPC technology. Altera Corporation system to the Cyclone FPGA series of digital platform, microprocessor, bus, Digital Frequency Synthesizer, memory and I/O interface hardware concentrated in an FPGA, the use of direct digital frequency synthesis technology and digital modulation waveforms required to achieve the rise, Using FPGA ROM storage of the DDS waveform table, and make full use of on-chip resources, improve the system's accuracy, stability and robustness. Use of new digital signal processing (DSP) technology, Nios through software programming to solve different ways of achieving modulation and choice. Realize the system freq
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Size: 407552 |
Author: 刘斐 |
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Description: 本程序功能是在FPGA上nios处理器的lcd接口程序。-The program features in the FPGA on the Nios processor lcd interface program.
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Size: 5120 |
Author: 李成 |
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Description: 本程序功能是在FPGA上nios处理器的sram接口程序。-The program features in the FPGA on the Nios processor
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Size: 1024 |
Author: 李成 |
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Description: 基于fpga和sopc的用VHDL语言编写的EDA的32位Nios CPU嵌入式系统及其DMA设计俄罗斯方块游戏机-FPGA and SOPC based on the use of VHDL language EDA 32-bit Nios CPU and the DMA design of embedded systems Tetris game
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Size: 2194432 |
Author: 多幅撒 |
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Description: 高级fpga编程,采用nios2软核,适合指导高级用户-Senior FPGA programming using nios2 soft-core, suitable for advanced users guide
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Size: 421888 |
Author: xiaoshuai |
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Description: FPGA and NIOS原理图,很实用,很重要的东西-FPGA and NIOS schematic diagram, it is useful, very important things
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Size: 24576 |
Author: cj |
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Description: 将msp430与使用nios的fpga相连,将fpga作为msp430的jtag使用。其中用到了nios内的多种接口以及dma操作-The MSP430 with the use of the Nios FPGA connected to the FPGA as the MSP430 JTAG to use. Which used the Nios multiple interfaces and dma operation
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Size: 56320 |
Author: danielmu |
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Description: Altera公司开发的用于其FPGA的的Nios软核入门介绍-Developed by Altera for its FPGA of the Nios soft-core entry-Introduction
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Size: 1537024 |
Author: liukun |
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Description: 一款240*128的LCD模块在ALTERA FPGA NIOS中的应用,自己写的AVALON总线IP,包括所有源码,可轻松用于NIOS中,供大家参考-A 240* 128 LCD module in the ALTERA FPGA NIOS application, write your own AVALON Bus IP, including all source code can be easily used in NIOS for reference
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Size: 13312 |
Author: 张敏 |
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Description: FPGA nios ii 快速入门教程 适用于初学者 简单易懂 方便-FPGA nios ii QuickStart for easy convenience beginners
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Size: 2038784 |
Author: 陈鹏 |
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Description: The concept of the Altera Nios II embedded processor implementation inside Field Programmable Gate Array [FPGA] of the CCD camera for the “Pi of the Sky” experiment is presented. The digital board of the CCD camera, its most important components, current implementation of firmware [VHDL] inside the FPGA and the role of external 8051 microcontroller is briefly described. The main goal of the presented work is to get rid of the external microcontroller and to design new system with Nios II processor built inside FPGA chip. Constraints for implementing the design into the existing camera boards are discussed. New possibilities offered by a larger FPGA for next generation of cameras are considered.-The concept of the Altera Nios II embedded processor implementation inside Field Programmable Gate Array [FPGA] of the CCD camera for the “Pi of the Sky” experiment is presented. The digital board of the CCD camera, its most important components, current implementation of firmware [VHDL] inside the FPGA and the role of external 8051 microcontroller is briefly described. The main goal of the presented work is to get rid of the external microcontroller and to design new system with Nios II processor built inside FPGA chip. Constraints for implementing the design into the existing camera boards are discussed. New possibilities offered by a larger FPGA for next generation of cameras are considered.
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Size: 1427456 |
Author: Francis Wu |
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Description: 复旦大学Nios的经典教程,主要包括FPGA的配置等-Classic tutorial University Nios, including FPGA configuration, etc.
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Size: 3615744 |
Author: 李博 |
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Description: Pacman 4 DE1-FPGA-Board
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Size: 943104 |
Author: bert1970 |
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Description: NIOS 软核 教程
基于NIOS的SOPC设计与实践-NIOSII using FPGA
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Size: 3654656 |
Author: 汤鑫祥 |
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Description: FPGA,SOPC,NIOS_II_IDE的使用介绍已经程序设计,很好的一个PDF,觉得很有用!-FPGA, SOPC, NIOS_II_IDE introduction has been the use of program design, good a PDF, find useful
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Size: 1629184 |
Author: hanbin |
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Description: altera fpga的nios经典教材-altera fpga s classic textbook about nios
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Size: 3614720 |
Author: bentley |
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