Search - Quartus2 9.1

[SCM] clk_scan

Description: 采用Quartus2编写的数码管扫描显示电路共有三个电路电路1：当按下启动计时按钮时，实验箱上的8个数码管数码1~8以4Hz的频率，从0到9反复不停计数，8个数码管同一时刻显示同一个数字。当按下异步清零按钮时，则8个数码管均显示为0。电路2：当按下启动计时按钮时，8个数码管1~8以4Hz的频率完成从0到9的跳跃循环计数，即每一时刻只有一个数码管点亮。即：数码管1计数0后，数码管2计数1，以此类推，数码管8计数7后，数码管1再计数8……。当按下异步清零按钮时，则数码管1点亮，显示数字0；其它数码管不亮。电路3：利用人眼的视觉暂留效应，使6个数码管完成时间的扫描显示功能。数码管1和2显示秒的低位和高位，数码管4和5显示分钟的低位和高位，数码管7和8显示小时的低位和高位。当按下启动计时按钮时，开始计时；当按下异步清零按钮时，各计数器清零，6个数码管显示为000000。 -err
Platform: | Size: 1248256 | Author: gz208 | Hits:

[VHDL-FPGA-Verilog] Quartus2-superLicense

Description: 万能Lisence,本许可适用于各个版本的Quartus-Omnipotent Lisence, this license applies to all versions of the Quartus
Platform: | Size: 19456 | Author: jiangmin | Hits:

[VHDL-FPGA-Verilog] pll

Description: 是quartus2的仿真倍频电路，用于产生倍频时钟！-Is a multiplier circuit simulation quartus
Platform: | Size: 332800 | Author: 张宏伟 | Hits:

[Windows Develop] learn_rom_99multi

Description: 基于quartus ii 9.0的99乘法器，用rom表做成的乘法器可以计算9*9的乘法，并在数码管上显示，使用时请按照自己的芯片和引脚设置。-Quartus ii 9.0 based on 99 multiplier, made by rom multiplier table can calculate the multiplication 9* 9, and in the digital control display, according to their own use when the chip and pin set.
Platform: | Size: 487424 | Author: 陈东旭 | Hits:

[VHDL-FPGA-Verilog] lamp_daisy090629

Description: 使用altera公司的FPGA进行VHDL开发，使用quartus2 9.0 软件在EP1C3T144C8开发板上实现跑马灯输出。-Altera company s FPGA using VHDL to the development, use quartus2 9.0 software EP1C3T144C8 Development Board to achieve ticker output.
Platform: | Size: 350208 | Author: Daisy | Hits:

[VHDL-FPGA-Verilog] 4x4Key_daisy090708

Description: 使用Altera公司的FPGA进行VHDL开发。使用quartus2 9.0软件在EP1C3T144C8开发板上实现对4x4键盘的输入控制，并显示在一个8段式数码管上。-The use of Altera' s FPGA-VHDL development. Use quartus2 9.0 software EP1C3T144C8 the development board to realize 4x4 keyboard input control, and displayed in an eight-stage digital pipe.
Platform: | Size: 456704 | Author: Daisy | Hits:

[VHDL-FPGA-Verilog] TrafficLights_daisy090701

Description: 使用Altera公司的FPGA进行VHDL开发。使用quartus2 9.0软件在EP1C3T144C8开发板上实现对一个十字路口的交通灯的控制，包括4个红绿灯和4个2位的数码倒计时器。-The use of Altera' s FPGA-VHDL development. Use quartus2 9.0 software EP1C3T144C8 development board to realize a crossroads traffic lights control, including four traffic lights, and four 2-bit digital countdown device.
Platform: | Size: 551936 | Author: Daisy | Hits:

[VHDL-FPGA-Verilog] fifo

Description: 使用Altera公司的FPGA进行VHDL开发。使用quartus2 9.0软件在EP1C3T144C8开发板上实现先进先出的队列。-The use of Altera' s FPGA-VHDL development. Use quartus2 9.0 software EP1C3T144C8 Development Board to achieve FIFO queue.
Platform: | Size: 164864 | Author: Daisy | Hits:

[VHDL-FPGA-Verilog] and_2

Description: 使用Altera公司的FPGA进行VHDL开发。使用quartus2 9.0软件在EP1C3T144C8开发板上用硬件描述语言实现一个与门。-The use of Altera' s FPGA-VHDL development. Use quartus2 9.0 software EP1C3T144C8 development board with hardware description language to achieve an AND gate.
Platform: | Size: 171008 | Author: Daisy | Hits:

[VHDL-FPGA-Verilog] ram

Description: 使用Altera公司的FPGA进行VHDL开发。使用quartus2 9.0软件在EP1C3T144C8开发板上用硬件描述语言实现一个RAM存储器。-The use of Altera' s FPGA-VHDL development. Use quartus2 9.0 software EP1C3T144C8 development board with hardware description language to achieve a RAM memory.
Platform: | Size: 198656 | Author: Daisy | Hits:

[VHDL-FPGA-Verilog] rom

Description: 使用Altera公司的FPGA进行VHDL开发。使用quartus2 9.0软件在EP1C3T144C8开发板上用硬件描述语言实现一个ROM存储器。-The use of Altera' s FPGA-VHDL development. Use quartus2 9.0 software EP1C3T144C8 development board with hardware description language to achieve a ROM memory.
Platform: | Size: 179200 | Author: Daisy | Hits:

[GUI Develop] PP

Description:
Platform: | Size: 5502976 | Author: 华哲 | Hits:

[VHDL-FPGA-Verilog] calculator

Description: 用VHDL在quartus2下实现的计算器。输入为4*4矩阵键盘，输出为共用数据线的数码管。可以实现简单数学运算、逻辑运算、进制转换、连续运算等功能。-Using VHDL in quartus2 achieve calculator. Input 4* 4 matrix keyboard, the output data lines for sharing of digital control. Can achieve a simple mathematical operations, logical operations, binary conversion, continuous operations and other functions.
Platform: | Size: 1276928 | Author: jizhen | Hits:

[VHDL-FPGA-Verilog] SPYRAL

Description: quartus2 9.1版本的破解文件，绝对好用，我正在用。-quartus2 9.1 version of crack files, absolutely easy to use, I was using.
Platform: | Size: 1640448 | Author: 周利均 | Hits:

[VHDL-FPGA-Verilog] sipo8

Description: 串入并出源代码，可进行8位数据的串/并转换。其中包括QUARTUS2的完整工程，有正确的仿真波形供参考。-In series and the source code, can be 8-bit data series/parallel conversion. Including QUARTUS2 complete project,and the correct simulation waveform for reference.
Platform: | Size: 217088 | Author: simulin_2008 | Hits:

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