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Title: pll Download
 Description: Is a multiplier circuit simulation quartus
 Downloaders recently: [More information of uploader 110484617]
 To Search: PLL VHDL pll
  • [dds] - Dds realize functions, using Quartus sof
  • [pll] - Collection of digital phase-locked loop
  • [fq_div] - pll 64 multiplier PLL multiplier used to
  • [006] - Based on the FPGA realization of a new d
  • [beipin_test] - The realization of arbitrary multiples o
  • [pll] - Implementation of the principle of phase
  • [clock] - By the phase-locked loop (PLL) have the
  • [pll] - The use of the ip qaurtus approved syste
File list (Check if you may need any files):
倍频
....\pll
....\...\db
....\...\..\prev_cmp_top.asm.qmsg
....\...\..\prev_cmp_top.fit.qmsg
....\...\..\prev_cmp_top.map.qmsg
....\...\..\prev_cmp_top.qmsg
....\...\..\prev_cmp_top.sim.qmsg
....\...\..\prev_cmp_top.tan.qmsg
....\...\..\top.asm.qmsg
....\...\..\top.cbx.xml
....\...\..\top.cmp.bpm
....\...\..\top.cmp.cdb
....\...\..\top.cmp.ecobp
....\...\..\top.cmp.hdb
....\...\..\top.cmp.logdb
....\...\..\top.cmp.rdb
....\...\..\top.cmp.tdb
....\...\..\top.cmp0.ddb
....\...\..\top.db_info
....\...\..\top.eco.cdb
....\...\..\top.eds_overflow
....\...\..\top.fit.qmsg
....\...\..\top.fnsim.cdb
....\...\..\top.fnsim.hdb
....\...\..\top.fnsim.qmsg
....\...\..\top.hier_info
....\...\..\top.hif
....\...\..\top.map.bpm
....\...\..\top.map.cdb
....\...\..\top.map.ecobp
....\...\..\top.map.hdb
....\...\..\top.map.logdb
....\...\..\top.map.qmsg
....\...\..\top.map_bb.cdb
....\...\..\top.map_bb.hdb
....\...\..\top.map_bb.hdbx
....\...\..\top.map_bb.logdb
....\...\..\top.pre_map.cdb
....\...\..\top.pre_map.hdb
....\...\..\top.psp
....\...\..\top.root_partition.cmp.atm
....\...\..\top.root_partition.cmp.dfp
....\...\..\top.root_partition.cmp.hdbx
....\...\..\top.root_partition.cmp.logdb
....\...\..\top.root_partition.cmp.rcf
....\...\..\top.root_partition.map.atm
....\...\..\top.root_partition.map.hdbx
....\...\..\top.root_partition.map.info
....\...\..\top.root_partition.merge_hb.atm
....\...\..\top.rtlv.hdb
....\...\..\top.rtlv_sg.cdb
....\...\..\top.rtlv_sg_swap.cdb
....\...\..\top.sgdiff.cdb
....\...\..\top.sgdiff.hdb
....\...\..\top.signalprobe.cdb
....\...\..\top.sim.cvwf
....\...\..\top.sim.hdb
....\...\..\top.sim.qmsg
....\...\..\top.sim.rdb
....\...\..\top.simfam
....\...\..\top.sld_design_entry.sci
....\...\..\top.sld_design_entry_dsc.sci
....\...\..\top.syn_hier_info
....\...\..\top.tan.qmsg
....\...\..\top.tis_db_list.ddb
....\...\..\wed.wsf
....\...\pll.bsf
....\...\pll.inc
....\...\pll.ppf
....\...\pll.qip
....\...\pll.vhd

....\...\pll_waveforms.html
....\...\top.asm.rpt
....\...\top.bdf
....\...\top.done
....\...\top.fit.rpt
....\...\top.fit.smsg
....\...\top.fit.summary
....\...\top.flow.rpt
....\...\top.map.rpt
....\...\top.map.summary
....\...\top.pin
....\...\top.pof
....\...\top.qpf
....\...\top.qsf
....\...\top.qws
....\...\top.sim.rpt
....\...\top.sof
....\...\top.tan.rpt
....\...\top.tan.summary
....\...\top.vwf
    

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