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Description: 在Quartus中实现256的RAM，经过实际的应用验证，没有问题的-Quartus achieved in 256 of the RAM, through the practical application of verification, no problem
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Size: 145408 |
Author: 郭翠双 |
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Description: 同步动态RAM的控制电路VHDL源代码,在SOC开发中可以直接应用-Synchronous Dynamic RAM control circuit VHDL source code, in the SOC development can be applied directly
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Size: 90112 |
Author: 26 |
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Description: 将AD转换得到的八位数据存入RAM，存1000个点，然后通过串行DA读出，DA芯片为TLV5638,AD芯片为tlc0820ac，RAM为FM25L16-AD conversion will be the eight data into RAM, keep 1000 points, and then read out through the DA serial, DA chips for the TLV5638, AD chips for tlc0820ac, RAM for FM25L16
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Size: 650240 |
Author: 王力 |
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Description: ad取样，经由cpld处理，存入ram 1000点并由串行的da进行还原-ad sampling, by the CPLD deal, deposited by the serial ram 1000 points to restore the da
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Size: 180224 |
Author: |
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Description: Linux操作系统，PPC405EP处理器上的Local BUS和DPRAM双口RAM接口的驱动程序和详细说明，以及使用到的信号量通讯等的说明文档，是典型的中断加双口RAM通讯的例子，非常实用。-Linux operating system, PPC405EP processor Local BUS and DPRAM Dual Port RAM interface drivers and a detailed description, and the use of semaphore communication documentation, etc., is a typical interruption plus dual-port RAM communication examples, very practical .
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Size: 286720 |
Author: XueTao |
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Description: 编制FPGA中RAM所需要的MIF文件
编制FPGA中RAM所需要的MIF文件-FPGA in the preparation of RAM required for the preparation of MIF files in the RAM of the FPGA needs MIF file
Platform: |
Size: 1936384 |
Author: 史东升 |
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Description: 32×4bit 的RAM设计。VHD语言。能在ISE上仿真。-32 × 4bit the RAM design. VHD language. The simulation in ISE.
Platform: |
Size: 3072 |
Author: 张军 |
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Description: EDA实验--RAM实验:利用-MegaWizard Plug-In Manager创建一个16×8的RAM，通过编程对RAM进行读写并在显示器上显示。
本例使用三个按键PSW3，PSW2，PSW1，分别对应顶层文件中的x，y，we，we＝1对RAM写，xy＝11时，写入10101011；当xy＝01时，写入01010101；当xy＝10时，写入10101010。we＝0时，对RAM读出。三个按键按下时为0，当PSW1健按下时对RAM进行读出。
-EDA Experimental RAM experiment: the use-MegaWizard Plug-In Manager to create a 16 × 8 of the RAM, through the programming of the RAM read and write and displayed on the monitor. This example uses three buttons PSW3, PSW2, PSW1, corresponding to top-level document x, y, we, we = 1 on RAM write, xy = 11, the write 10101011 when xy = 01 hours, write 01010101 when xy = 10, the write 10101010. we = 0 when read out of RAM. Press the three keys for 0, when PSW1 Kin-pressed to read out of RAM.
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Size: 4096 |
Author: 黄龙 |
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Description: ddr ram controller vhdl code
Platform: |
Size: 55296 |
Author: heyong |
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Description: 这是51的相关内部外部RAM程序，经过调试的。-This is the 51 procedures related to internal and external RAM, through debugging.
Platform: |
Size: 3072 |
Author: 周俊辉 |
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Description: 通过程序完成动态分区存储管理方式的内存分配与回收.-Procedures are completed through dynamic partitioning storage management and recovery of memory allocation.
Platform: |
Size: 1427456 |
Author: apolo |
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Description: 交大ARM培训教材\arm培训教材\RAM汇编语言编程.pdf-National Chiao Tung University ARM training materials arm training materials RAM assembly language programming. Pdf
Platform: |
Size: 231424 |
Author: |
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Description: D169 Demo - DMA0 Repeated Burst to-from RAM, Software Trigger
Description A 32 byte block from 220h-240h is transfered to 240h-260h
using DMA0 in a burst block using software DMAREQ trigger.
After each transfer, source, destination and DMA size are
reset to inital software setting because DMA transfer mode 5 is used.
P1.0 is toggled durring DMA transfer only for demonstration purposes.
** RAM location 0x220 - 0x260 used - always make sure no compiler conflict **
ACLK= n/a, MCLK= SMCLK= default DCO ~ 800k-D169 Demo- DMA0 Repeated Burst to-from RAM, Software Trigger
Description A 32 byte block from 220h-240h is transfered to 240h-260h
using DMA0 in a burst block using software DMAREQ trigger.
After each transfer, source, destination and DMA size are
reset to inital software setting because DMA transfer mode 5 is used.
P1.0 is toggled durring DMA transfer only for demonstration purposes.
** RAM location 0x220- 0x260 used- always make sure no compiler conflict**
ACLK= n/a, MCLK= SMCLK= default DCO ~ 800k
Platform: |
Size: 7168 |
Author: 梁武潔 |
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Description: RAM存储器： 设定16 个8 位存储单元。如果read= 1 则dataout<=mem(conv_integer(address)). 如果write= 1 则mem(conv_integer(address))<=datain. -RAM memory: Set 16 8 memory cell. If read = 1 is dataout
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Size: 1024 |
Author: 良芯 |
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Description: xilinx 开发板原程序，双口RAM控制-Xilinx development board the original procedures, dual-port RAM control
Platform: |
Size: 195584 |
Author: zhang |
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Description: 6713emiftofpgatopci,这个是完整的一套从6713的emif到fpga的双口ram，然后主机通过9054到双口ram，交换数据完成-6713emiftofpgatopci, this is a complete set of the EMIF from 6713 to the FPGA
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Size: 2048 |
Author: 丁科 |
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Description: 一個單晶片8051模擬軟體,可以查看模擬的內部外部RAM資料及暫存器資料,並設置斷點
windows 平台下執行-8051 Simulation of a single-chip software, you can view the internal and external RAM simulation data and register data, and set breakpoints under windows platform for the implementation of
Platform: |
Size: 329728 |
Author: 何圣泉 |
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Description: 高速双端口RAM的vhdl实现。包含仿真波形-High-speed dual-port RAM realize the VHDL. Contains the simulation waveform
Platform: |
Size: 303104 |
Author: liujingxing |
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Description: 利用vhdl编写的双端口Ram程序，不带数据纠错处理-VHDL prepared to use dual-port Ram procedures, do not deal with data error correction
Platform: |
Size: 1024 |
Author: 孙敬辉 |
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Description: HFAT32 v1.0是我依据FAT标准,按照自己的理解写出来的一个FAT文件系统
特性:
1.HFAT32 v1.0 是一个小型的嵌入式FAT文件系统,可以方便地在nand flash,RAM和SD Card等
存储设备上创建FAT文件系统和操作它.
2.目前支持FAT16/32,支持长文件名.-I HFAT32 v1.0 is based on FAT standards, according to their own understanding of written in a FAT file system characteristics: 1.HFAT32 v1.0 is a small embedded FAT file system, can be easily in the nand flash, RAM and SD Card such as storage devices to create a FAT file system and operating it .2. currently supports FAT16/32, support long file names.
Platform: |
Size: 276480 |
Author: 长空飞雪 |
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