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Description: Spartan 3 Digilent Demo:This demo drives the perphrials on the Spartan 3 board. This drives a simple pattern to the VGA port, connects the switches to the LEDs, buttons to each anode of the seven segment decoder. The seven segment decoder has a simple counter running on it, and when SW0 is in the up position the seven segment decoder will display scan codes from the PS2 port. This demo how ever does not drive the RS-232 port or the memory. This is a simple design done entirely VHDL not microblaze.
Platform: |
Size: 731568 |
Author: Roy Hsu |
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Description: Spartan 3 Digilent Demo:This demo drives the perphrials on the Spartan 3 board. This drives a simple pattern to the VGA port, connects the switches to the LEDs, buttons to each anode of the seven segment decoder. The seven segment decoder has a simple counter running on it, and when SW0 is in the up position the seven segment decoder will display scan codes from the PS2 port. This demo how ever does not drive the RS-232 port or the memory. This is a simple design done entirely VHDL not microblaze.
Platform: |
Size: 731136 |
Author: Roy Hsu |
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Description: 实现PS/2接口与RS-232接口的数据传输，
可以通过RS-232自动传送到主机的串口调试终端上并在数据接收区显示接收到的字符。-The realization of PS/2 port RS-232 interface with data transfer, RS-232 can be automatically sent to the host serial debug terminal and reception area in the data display received characters.
Platform: |
Size: 15360 |
Author: 包宰 |
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Description: serial io for rs 232 communication
Platform: |
Size: 900096 |
Author: prakash |
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Description: 本课题所设计的UART支持标准的RS．232C传输协议，主要设计有发送模块、接收模块、线路控制与中断仲裁模块、Modem控制模块以及两个独立的数据缓冲区FIFO模块。该模块具有可变的波特率、数据帧长度以及奇偶校验方式，还有多种中断源、中断优先级、较强的抗干扰数据接收能力以及芯片内部自诊断的能力，模块内分开的接收和发送数据缓冲寄存器能实现全双工通信。除此之外最重要的是利用口模块复用技术设计数据缓冲区FIFO，采用两种可选择的数据缓冲模式。这样既可以应用于高速的数据传输环境，也能适合低速的数据传输场合，因此可以达到资源利用的最大化。-According to the characteristics of the UART and the portability advantage of FPGA designs，this paper puts forward an embedded UART design method based on FPGA chips．The design method includes description form of FSM and design approach of Top-Down．It’S good to take advantage of VHDL to program the slave module and top module of UART，and then integrate them into the interior of FPGA chip．In this case it improves not only the disadvantage of the traditional UART chips but also makes the whole system more compact and more reliable．
Platform: |
Size: 5072896 |
Author: mabeibei |
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Description: RS-232 transmir control programmed in VHDL
Platform: |
Size: 1024 |
Author: JT_LADINO |
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Description: receiver RS-232 programmed in VHDL
Platform: |
Size: 3072 |
Author: JT_LADINO |
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Description: 在ISE环境下，用VHDL语言实现RS232串口设计，实现串口通信。通过串口调试工具向
0000000UART发送16进制数，FPGA将UART接收到的串行数据转换为并行数据，并在8个
LED灯上输出显示；同时，并行数据又被重新转换为串行数据，重新送给RS-232接口，并在
串口调试工具上再次显示，SW0为复位键。
比如：串口调试工具发送两位16进制数，然后能在LED上显示，并且重新在串口调试工
具上显示。串口调试工具设置：波特率设为9600，默认奇校验。-In the ISE environment, using VHDL language RS232 serial port design, serial communication. Through the serial debugging tool to
0000000UART Send a hexadecimal number, FPGA serial data received by the UART converted to parallel data, and 8
LED lights on the output display the same time, parallel data has been re-converted to serial data, re-sent to the RS-232 interface, and in
Serial debugging tools on the show again, SW0 for the reset button.
For example: serial debugging tool to send two 16 hexadecimal number, and then can be displayed on the LED, and re-debugging in the serial port
With a display. Serial debugging tool settings: baud rate is set to 9600, the default odd parity.
Platform: |
Size: 403456 |
Author: panda |
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