Search - RS decoder

[Other] rs-codec-8-16

Description: 这是一个rs译码器的verilog程序运行于quatus-This is a rs decoder running on Verilog quatus
Platform: | Size: 132096 | Author: yuanfeng | Hits:

[Other] rs-codec-8-16

Description: 这是一个rs译码器的verilog程序运行于quatus-This is a rs decoder running on Verilog quatus
Platform: | Size: 133120 | Author: yuanfeng | Hits:

Description: encode.v The encoder syndrome.v Syndrome generator in decoder berlekamp.v Berlekamp algorithm in decoder chien-search.v Chien search and Forney algorithm in decoder decode.v The top module of the decoder inverse.v Computes multiplication inverse of an Galois field element test-bench.v The test fixture, and some brief notes on using the modules. data-rom.v A simple data source for testing run For those intelligence-challenged who can t run verilog LGPL The license -encode.v syndrome.v Syndrome generator in decoder al berlekamp.v Berlekamp gorithm in decoder chien- search.v Chien searc h and Forney in decoder algorithm decode.v The t op module of the decoder inverse.v Computes intercommunication tiplication inverse of an element over Galois field test-bench.v The test fixture. and some brief notes on using the modules. data- rom.v A simple data source for testing run For th PNA intelligence-challenged who can not run veri The log LGPL license
Platform: | Size: 45056 | Author: zs8292 | Hits:

[VHDL-FPGA-Verilog] RS(32to28)encoderanddecoder

Description: RS(32,28) encoder and decoder VHDL-RS (32,28) encoder and decoder VHDL
Platform: | Size: 76800 | Author: 王文 | Hits:

[Communication-Mobile] RSdecod

Description: RS 码译码源程序,在Visual c++下可对比4元域上的RS码进行纠错译码.-RS decoder source, in Visual c contrast under four yuan domain of RS error correction code for decoding.
Platform: | Size: 194560 | Author: 说 | Hits:

[Other] RSDECODE

Description: RS译码器源码-RS decoder source
Platform: | Size: 1024 | Author: 杨竟 | Hits:

[VHDL-FPGA-Verilog] rs_decoder_31_19_6

Description: 里的所罗门RS编解码方案，建立工程后可直接编译调试，对于学习RS编码原理的人员可以作为一个例子学习，也可以应用于相应的系统中-In the Solomon RS codec program, the establishment of projects can be directly compiled debugging, RS coding principle for the study of personnel can be used as an example of learning, can also be applied to the corresponding system
Platform: | Size: 15360 | Author: 王弋妹 | Hits:

[VHDL-FPGA-Verilog] RS(204_188)decoder

Description: <Verilog HDL 语言编程》 RS(204,188)译码器的设计-<Verilog HDL language programming RS (204,188) Decoder
Platform: | Size: 11264 | Author: 李映波 | Hits:

[VHDL-FPGA-Verilog] RS_Euclid_FPGA

Description: RS译码的Euclid算法及其FPGA实现，并通过仿真器的出结果，对于设计ＲＳ译码很有帮助-RS decoding Euclid algorithm and its FPGA implementation, and through the simulator results are helpful for the design of RS decoder
Platform: | Size: 52224 | Author: 番茄 | Hits:

[VHDL-FPGA-Verilog] RS(31-19-6)

Description: reed-solomon译码器。共有7个文件，分别为译码器的7个模块。-reed-solomon decoder. A total of seven papers, respectively, the decoder module 7.
Platform: | Size: 9216 | Author: liwei | Hits:

[VHDL-FPGA-Verilog] c23_RS_decoder

Description: 精通verilog HDL语言编程源码9——RS(204,188)译码器的设计-Proficient in verilog HDL source programming language 9- RS (204188) decoder design
Platform: | Size: 13312 | Author: 李平 | Hits:

[Mathimatics-Numerical algorithms] RS-decoder-DSP

Description: RS编译码器的DSP实现，首先用MATLAB仿真，最后在DSP上实现-RS of DSP codecs to achieve, the first simulation using MATLAB, and finally realized in the DSP
Platform: | Size: 865280 | Author: 小范 | Hits:

[VHDL-FPGA-Verilog] rs-codec-8-16

Description: RS[255,223]纠错码verilog源码，包含编码和解码模块，以及testbench等。-Verilog source code for RS[255,223] encoder and decoder, with testbench included.
Platform: | Size: 27648 | Author: 饶进平 | Hits:

[Modem program] rscode-1.0

Description: RS译码器的C源代码,采用了BM算法，钱搜索，和福尼算法求错误值-the rs decoder c code
Platform: | Size: 361472 | Author: 刘大鹏 | Hits:

[VHDL-FPGA-Verilog] rs_5_3_gf256_latest.tar

Description: this paper deal with rs decoder algorithm-this paper deal with rs decoder algorithm
Platform: | Size: 781312 | Author: Ibrahim | Hits:

[matlab] RS_encode_with_toolbox_decode

Description: rs编码仿真,搭配matlab工具箱的rs解码进行验证,绝对可用!-rs coding simulation, with matlab toolbox rs decoder to verify, absolutely free!
Platform: | Size: 3072 | Author: chd | Hits:

[VHDL-FPGA-Verilog] rs_decoder204_188

Description: RS译码的Verilog实现，用的是改进的BM算法，已在QuautusII9.0上调试通过-rs decoder verilog
Platform: | Size: 9468928 | Author: songbing | Hits:

[VHDL-FPGA-Verilog] RS

Description: RS译码器的设计，使用RS码设计的译码器-RS decoder design, the use of RS code decoder design
Platform: | Size: 12288 | Author: 许皓天 | Hits:

[VHDL-FPGA-Verilog] RS

Description: RS译码器的设计源程序--verilog HDL实现-Design of the RS decoder source code-- Verilog HDL
Platform: | Size: 14336 | Author: 王垚 | Hits:

[VHDL-FPGA-Verilog] RS-decoder

Description: RS 解码器主要包括以下5 个主要部分：伴随式计算、计算错误位置和错误值多项式、钱搜索计算错误位置、福尼算法计算错误值和纠正解码输出。-RS decoder includes the following five main parts: With style, calculated error location and error value polynomial, Calculated error location search of money
Platform: | Size: 521216 | Author: lee | Hits:

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[Other] rs-codec-8-16

[Other] rs-codec-8-16

[ELanguage] rs-codec-8-4

[VHDL-FPGA-Verilog] RS(32to28)encoderanddecoder

[Communication-Mobile] RSdecod

[Other] RSDECODE

[VHDL-FPGA-Verilog] rs_decoder_31_19_6

[VHDL-FPGA-Verilog] RS(204_188)decoder

[VHDL-FPGA-Verilog] RS_Euclid_FPGA

[VHDL-FPGA-Verilog] RS(31-19-6)

[VHDL-FPGA-Verilog] c23_RS_decoder

[Mathimatics-Numerical algorithms] RS-decoder-DSP

[VHDL-FPGA-Verilog] rs-codec-8-16

[Modem program] rscode-1.0

[VHDL-FPGA-Verilog] rs_5_3_gf256_latest.tar

[matlab] RS_encode_with_toolbox_decode

[VHDL-FPGA-Verilog] rs_decoder204_188

[VHDL-FPGA-Verilog] RS

[VHDL-FPGA-Verilog] RS

[VHDL-FPGA-Verilog] RS-decoder

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