Search - RS232 VHDL

Search - RS232 VHDL - List

[VHDL-FPGA-Verilog] vhdl DL : 0: RS232数据发送器,适合于VHDL的初学者参考-RS232 data transmitter, suitable for beginners VHDL reference
Update : 2025-02-17 Size : 4kb Publisher : 波波
[VHDL-FPGA-Verilog] RS232-for-vdhl DL : 0: RS232通讯VHDL源代码,MAXPLUS 2环境执行通过-RS232 communications VHDL source code, Segments 2 environment through implementation
Update : 2025-02-17 Size : 158kb Publisher : lq
[Post-TeleCom sofeware systems] rs232_send DL : 0: rs232 vhdl程序可以实行异步串行通信,这里只有send-rs232 vhdl procedures implemented asynchronous serial communication, here only send
Update : 2025-02-17 Size : 1kb Publisher : 李湘宏
[VHDL-FPGA-Verilog] uart_vhdl_lattice DL : 0: UART的rs232通信接口VHDL语言，里面有详细的介绍-UART communication interface rs232 VHDL language, which is described in detail
Update : 2025-02-17 Size : 106kb Publisher : 拉拉
[Communication] URAT DL : 0: 最常见的rs232通信的vhdl实现，经过实际使用验证-The most common communication RS232 VHDL realize, through actual use of authentication
Update : 2025-02-17 Size : 32kb Publisher : 江泽民
[VHDL-FPGA-Verilog] rs232 DL : 0: RS232 verilog design
Update : 2025-02-17 Size : 112kb Publisher : liuKe
[VHDL-FPGA-Verilog] RS232 DL : 0: quatus II 环境下vhdl实现RS232功能-quatus II environment realize RS232 VHDL functional
Update : 2025-02-17 Size : 427kb Publisher : 王艳华
[VHDL-FPGA-Verilog] RS232 DL : 0: 基于VHDL的RS232通讯程序,包含完整的源代码,锁脚文件以及下载文件,可直接下载使用-VHDL based on the RS232 communication procedures, including complete source code, locking pin, as well as download files documents can be directly downloaded using
Update : 2025-02-17 Size : 16kb Publisher : 陈泽涛
[VHDL-FPGA-Verilog] RS232uart(VHDL) DL : 0: 256字节深度的RS232串口程序,共分4个模块,顶层文件\FIFO程序\串口收和串口发.经过测试已用于产品.可靠!-Depth of 256-byte Serial RS232 procedures, divided into four modules, top-level document procedures FIFO serial and serial-fat collection. After the test has been used in products. Reliable!
Update : 2025-02-17 Size : 5kb Publisher : 温海龙
[VHDL-FPGA-Verilog] RS232 DL : 0: RS232串口通信协议，verilog实现，通过FPGA完全调通。-RS232 serial communication protocol, verilog achieved entirely through the FPGA transfer pass.
Update : 2025-02-17 Size : 3kb Publisher : dingsheng
[Embeded-SCM Develop] RS232.VHDL DL : 0: RS232 Communication function in VHDL for Spartan 3E
Update : 2025-02-17 Size : 1kb Publisher : Tony Tan
[Other] RS232 DL : 0: 关于RS232的VHDL程序，具体是什么还不是太清楚，不过程序还是可以借鉴-RS232 on the VHDL program, specifically what is not too clear, but the procedure can still learn from
Update : 2025-02-17 Size : 293kb Publisher : y
[Other Embeded program] RS232 DL : 0: 详细的Rs232接口设计思路，通讯规则，及详细代码-Rs232
Update : 2025-02-17 Size : 121kb Publisher : ZC
[ARM-PowerPC-ColdFire-MIPS] RS232 DL : 0: a good example of rs232 communication based on hdl language
Update : 2025-02-17 Size : 824kb Publisher : hao3361
[VHDL-FPGA-Verilog] RS232 DL : 0: RS232的FPGA通讯程序，用的是VHDL语言写的，非常好用-RS232 communication program of the FPGA, using the VHDL language, very easy to use
Update : 2025-02-17 Size : 357kb Publisher : 无名氏
[Com Port] rs232 DL : 0: 这是cpld，EPM240数据通信rs232程序，希望与大家分享-This is cpld, EPM240 data communication rs232 procedure, hoping to share with you
Update : 2025-02-17 Size : 129kb Publisher : 蓝风
[VHDL-FPGA-Verilog] rs232 DL : 1: 完整的RS232 Verilog源代码，支持波特率可调，支持调试命令，配合串口调试工具，可作为FPGA开发中的调试平台。-Full RS232 Verilog source code, support for baud rate is adjustable to support debugging command, with the serial debugging tools can be used as the debugging FPGA development platform.
Update : 2025-02-17 Size : 13kb Publisher : 弘历
[VHDL-FPGA-Verilog] RS232(1) DL : 0: 基于FPGA的串行通信接口设计，用硬件描述语言VHDL实现-FPGA-based serial communication interface design, using hardware description language VHDL implementation
Update : 2025-02-17 Size : 1018kb Publisher : 吴海霞
[VHDL-FPGA-Verilog] rs232 DL : 0: uart rs232 receiver and transmiter
Update : 2025-02-17 Size : 4kb Publisher : franek kimono
[VHDL-FPGA-Verilog] RS232 DL : 0: RS232 串口通信的 VHDL描述，初学FPGA的朋友可以-RS232 serial communication VHDL description, FPGA beginner friends can see
Update : 2025-02-17 Size : 1.28mb Publisher : chengwenfan

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