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[Other resource] rtl

Description: 用verilog编写的网卡芯片rtl级。前仿后仿都通过了，可以在modelsim上运行察看-verilogrtl After the former imitation through imitation, it can run on the look modelsim
Platform: | Size: 93845 | Author: 刘吉 | Hits:

[Other resource] rtl

Description: JTAG design verilog code.
Platform: | Size: 4124 | Author: assa | Hits:

[VHDL-FPGA-Verilog] rtl

Description: 用verilog编写的网卡芯片rtl级。前仿后仿都通过了，可以在modelsim上运行察看-verilogrtl After the former imitation through imitation, it can run on the look modelsim
Platform: | Size: 93184 | Author: 刘吉 | Hits:

[source in ebook] SystemC片上系统设计源代码

Description: SystemC片上系统设计的源代码： 书籍介绍： SystemC是被实践证明的优秀的系统设计描述语言，它能够完成从系统到门级、从软件到硬件、从设计到验证的全部描述。SystemC 2.01已作为一个稳定的版本提交到IEEE，申请国际标准。 本书为配合清华大学电子工程系SystemC相关课程的教学而编写。全书分9章，内容包括：硬件描述语言的发展史；SystemC出现的历史背景和片上系统设计方法学概述；SystemC的基本语法；SystemC的寄存器传输级设计和SystemC的可综合语言子集，以及根据作者设计经历归结的RTL设计准则和经验；接口、端口和通道等SystemC行为建模实例——片上总线系统；SystemC与VHDL/Verilog HDL的比较；SystemC的验证标准和验证方法学；SystemC开发工具SystemC_win、WaveViewer等，以及使用MATLAB进行SystemC算法模块的验证。每一章都精心编写了课后习题以配合教学的需要。 本书可作为大学电子设计自动化（EDA）相关课程教材，也可供电子工程技术人员作为SystemC设计、应用开发的技术参考书。本书丰富的实例源代码特别适合初学者根据内容实际运行、体会，举一反三，以掌握SystemC进行应用系统设计。 -SystemC system on chip design source : books introduced : SystemC has been proven in practice is an excellent system design description language, it can be completed from the system level to the door, from hardware to software, from design to verification of all description. SystemC has 2.01 as a stable version submitted to the IEEE, the application of international standards. The book to tie in electronic engineering at Tsinghua University SystemC related courses and preparation of teaching. Book nine chapters, including : hardware description language development history; SystemC is the historical background and system-on-chip design methodology outlined; SystemC basic grammar; SystemC register-transfer-level design and synthesis of SystemC language subset, as well as design experience b
Platform: | Size: 2640896 | Author: c.li | Hits:

[VHDL-FPGA-Verilog] pcirtl

Description: 用verilog编写的pci——rtl级。-using Verilog prepared by the pci-- rtl level.
Platform: | Size: 197632 | Author: 程 | Hits:

[VHDL-FPGA-Verilog] rtl

Description: JTAG design verilog code.
Platform: | Size: 4096 | Author: assa | Hits:

[Speech/Voice recognition/combine] speech

Description: 用verilog HDL实现自相关算法！ RTL级可综合代码！ 通过modelsim5.6仿真和quartusii7.1综合！-Verilog HDL using auto-correlation algorithm to achieve! RTL-level code can be integrated! Through simulation and modelsim5.6 integrated quartusii7.1!
Platform: | Size: 3072 | Author: ji | Hits:

[VHDL-FPGA-Verilog] book

Description: Verilog HDL与VHDL都是数字系统设计的硬件描述语言，VerilogHDL适合算法级，rtl，逻辑级，门级，而VHDL适合特大型的系统级设计。针对这些特点这两本书深入浅出的介绍了这两种语言。-Verilog HDL and VHDL design of digital systems is the hardware description language, VerilogHDL suitable algorithm level, rtl, logic level, gate-level, and large VHDL for system-level design. In response to these characteristics of these two books in simple terms to introduce the two languages.
Platform: | Size: 15562752 | Author: 龙英 | Hits:

[Other] rtl

Description: ddr controller in verilog-ddr controller in verilog...............
Platform: | Size: 69632 | Author: guanchuanjian | Hits:

[Other] rtl

Description: SPI verilog RTL code
Platform: | Size: 5120 | Author: china | Hits:

[Compress-Decompress algrithms] LIP6492CORE_zigzag

Description: Compression ZingZang RTL Verilog source code
Platform: | Size: 430080 | Author: jc | Hits:

[VHDL-FPGA-Verilog] USB2.0IP(RTL)

Description: USB2.0 IP核,ASIC,FPGA可用,Verilog HDL源代码-USB2.0 IP,Verilog HDL
Platform: | Size: 64512 | Author: AmazingEric | Hits:

[VHDL-FPGA-Verilog] IFFT-RTL

Description: 本人自己写的可实现512点或64点IFFT算法的verilog硬件代码-the verilog code for IFFT algorithm
Platform: | Size: 279552 | Author: 李慧 | Hits:

[VHDL-FPGA-Verilog] rtl

Description: LCD1602 Verilog 代码实现。包括数据读写，地址读写，初始化。支持4位总线格式。注意:此程序已经在ML506板子上验证过。本人花了好几天调试，开发出来的。值得推荐。-Verilog coding for LCD1602 display
Platform: | Size: 20480 | Author: liangyao | Hits:

[VHDL-FPGA-Verilog] aes_verilog

Description: A RTL verilog coding for the project AES, which is a cryptography based concepts
Platform: | Size: 7396352 | Author: siva | Hits:

[VHDL-FPGA-Verilog] Verilog-Digital-System-Design

Description: Verilog数字系统设计——RTL综合.测试平台与验证 书中的所有源代码-Verilog Digital System Design- RTL synthesis. Test and verification platform for all the source code for the book
Platform: | Size: 8890368 | Author: 鲁智深 | Hits:

[SCM] the-verilog-source-code-of-8051-MCU

Description: 8051单片机的源代码,用verilog进行编写，包括测试文件-source code of 8051 MCU
Platform: | Size: 310272 | Author: 许伟涛 | Hits:

[VHDL-FPGA-Verilog] verilog数字系统设计-rtl综合、测试平台与验证源代码

Description: verilog 程序，verilog数字系统设计-rtl综合、测试平台与验证源代码
Platform: | Size: 474648 | Author: zhoubingzhang4539@126.com | Hits:

[Com Port] Master SPI的Verilog源代码(包括文档 测试程序)

Description: SPI接口的从机实现（利用verilog HDL语言）(Slave implementation of SPI interface (using Verilog HDL language))
Platform: | Size: 185344 | Author: 够歇斯底里吗 | Hits:

[source in ebook] Verilog数字系统设计

Description: verilog 数字系统设计 -RTL综合 测试平台与验证 的 随书光盘源程序(This rigorous text shows electronics designers and students how to deploy Verilog in sophisticated digital systems design)
Platform: | Size: 8197120 | Author: 现代楼 | Hits:
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